STM32F103 ADC Noise

Question

I am new to this forum. I have read the questions and answers in this forum on the similar topics but that one was for STM32F2 CPU. I am using STM32F103 and I have similar problem.

Similar to the last topic I am using a two layers board. I have separate the Analog and Digital grounds and they joined at power supply input. I have separate analog and digital power supply, using voltage regulator TLV70033. The reference voltage is 3V and is ref by REF3030. All the digital CPU supply are bypassed by 100nF 0805 ceramic Caps. Similarly the Analog supply and Ref voltage are bypassed by 100nF Caps. The Analog supply and Ref voltage bypass caps' ground is connected to the analog ground.

My CPU is using 8MHz crystal and the PLL is set to 6, so the CPU is running at 48MHz( because I want to use the USB port )

My problem is I found the signal collected by the ADC is noisy. My ADC sampling clock is 1MHz and the "sample and hold" is set at 239.5 Clk cycle ( fairly slow ). Sampling is trigger by a timer that is set at 3968Hz and the result of the ADC is DMA to a buffer. When 32 ADC results is collected, it causes an interrupt. In the interrupt routine I send out( Via USB ) those ADC results that are not Zero. I can see the results on my PC. The USB record shows that in most DMA cycle only 4 or 5 are none zero, and are fairly small. Most are less than 5 which I can accept. However, occasionally ( 1 or 2 percent ) the ADC result is bigger than 16 and some time it could be as big as 68count.

Can somebody give me some advices on the likely cause of the noise and how I could eliminate them.

Thank you in advance.

Tommy

Edit> I should have spell out in my initial posting that my board power supply input is 30V and I uses LM2842( 500KHz buck converter) to step down to 5V and then the 5V is further step down to 3.3V ( for both digital and analog circuit). My analog CRO shows that the switching noise is getting into my analog supply and VRef. When I remove the buck converter and use a 78M05 instead, I can get a very stable ADC readings ( maximum deviation 4LSB per 32 DMA tranfer ), but the 78M05 is getting very hot. I am think of using the Buck converter to step down to 8 or 9 volt, then use 78L05 or similar to step down to 5V. Hopefully the PSRR of two stages of linear power regulator will remove most of then switching noise. My worry is will the radiated noise still get into my analog circuit or should I use a lower switching frequency (20KHz) buck converter? ( I only now realize that the PSRR of TLV70033 at 500KHz is very low). Thank you in advance.

Answer 1

We use F1/2 for our projects, sounds like your architecture is correct. F1 requires calibration, make sure it is in the code.

In terms of noise, #1 is equal to 0.73mV. In this case, 16 is about 11mV which is acceptable range. 68 is a bit high.

Do the following to see:

• Check the VRef pin to see if you have a glitch. REF3030 is a good part only for low frequency noise. If you have HF noise, it will show up on your VREF (PSRR is <20dB above 10KHz).
• Speed up your ADC sampling rate and compare the data
• Change your ADC sampling time to 3 cycles and repeat the experiment
• Make your software do nothing but this ADC thing and see if you get a better response, other peripherals routinely cause glitches

Come back with these and we can make more suggestions.

Answer 2

Your ADC is not "noisy", get that clear. The ADC is just doing its job as well it can with glitchy power.

First you need to get instrumented right. Hook up some micro-coax or even RG-174 right to the analog Vcc and VRef and ground pins RIGHT AT THE CPU. Keep the ground shield connections really short, as you don't want any big loop there to pick up the magnetic fields described below. THen measure the glitches and write down the numbers.

Switching power supplies can spew out a lot of noise. First check your inductor, if it's a cheap solenoid-wound on a ferrite bar, that may be part of the problem. The magnetic field arches way out from the ends of the rod. Any wire running in that magnetic field is going to get glitched. You might try fitting in a toroid of the same inductance. It will cost four times as much as the rod inductor, but it will have almost no magnetic field. compare the glitch voltage readings of the toroid and the rod and decide if the improvement is worth it.

Next try more filtering capacitance. Quadruple the filtering on the analog Vcc and see if that helps. Then try the same on the VRef. Compare the glitch readings and decide if the reduction is worth the extra size and cost of the capacitors.

If that doesnt help enough, you can try a resistor or inductor in series with the Vcc and ref lines. The VRef line is probably really high impedance (check!) so you can put a rather large resistor, several K, in series before the filter cap. That will seriously de-glitch that line. The analog Vcc current draw is about 2 milliamps, so you can't put a lot of resistance in that line, but you can probably get by with 100 or 220 ohms-- that before the filter capacitor (which is of course RIGHT BY the CPU) will also give you a good factor of 10 or more in deglitching.

getting rid of glitches is a bit of an art, but persevere and you'll get there.