# Can SSC be a problem if operating PCIe interface asynchronously through a re-driver?

I am operating PCIe over copper cables via re-drivers asynchronously. i.e. I only send over the RX/TX data.

The clock is sourced locally at the end point. For the host root port, I am designing a little PCIe add-in card that will have a PCIe re-driver.

For the add-in card I am wondering if I will need some sort of spread-spectrum clock squelching circuitry.

I am concerned that there will always be some hosts that will not let me turn off the spread-spectrum clocking.

You are operating the link in a source synchronous manner.

PCIe has a mechanism for crossing the receiver and local clock domains: the skip ordered set.

Provided the spread spectrum clock is a low enough frequecy in the link such that a receiver overrun cannot occur, you should be ok.

[Update]

Timing details.

Spread spectrum clocking was formally introduced in generation 3 but included all data rates.

The rules are quite simple:

$F_{ss}$ $30kHz \le 33kHz$

Modulation depth -.5%, 0% (therefore down spreading only is permitted).

A skip ordered set is scheduled (for generation 2) at between 2.36μsec and 3.076μsec. Given the spreading, it will have varied the output data edges by 7 psec which should not be an issue provided you have some margin on ISI

I cannot see a way you can remove spread spectrum from a signal that includes it without doing full clock and data recovery.

You can find an excellent discussion here and here