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I have a slightly complicated routing issue with an HDMI project I'm working on. The project will allow you to plug two HDMI cameras and flip between them on a display. An HDMI 2:1 mux chip acts as the switch.

For proper differential pair 100\$\Omega\$ impedance routing for HDMI, I've chosen a trace width of 10mil and spacing of 6mil on my 4-layer board. PCB stackup spec here.

The complication is caused by the orientation of one of the HDMI connectors and the geometry of the ESD protection chip (On-Semi ESD8040). The pins of the HDMI connector are on the "far side" of where I need to route the traces, so I have to first traverse under the connector. Then I go through the ESD chip and then into the HDMI mux. Because of how small the ESD chip is, I have to reduce the trace widths to 6mil to fit in between the pads.

You can see the the undesirable 6mil traces going from the connector (J8) to the ESD chip (U14). Routing them as close together as I can, their differential impedance is 120\$\Omega\$, which is beyond the HDMI spec. The total length of the traces from the connector to the mux are about 0.5 inch.

enter image description here

In order to make the 6mil traces achieve 100\$\Omega\$, the spacing would need to be less than 2mil, which is well beyond the capabilities of my PCB fabricator. You can see in my layout above, I chose to run the 6mil traces from the connector to the ESD chip and then jump back to 10mil downstream of the ESD chip. I doubt that's the optimal solution.

What would be a better way to reduce the unavoidable impedance mismatch? Here's what I've come up with so far:

  1. Route 10mil traces under the connector and then shrink the traces down to 6mil to go through the ESD chip (introduces another reflection point).

  2. Use 6mil traces all the way to the mux chip (reduces the number of reflection points but increases the length of higher impedance).

  3. Put ground pours on the top surface next to the 6mil traces to reduce their impedance.

  4. Use different ESD components (however I really like the ESD8040 - it's made for high-speed video and keeps the BOM count low).

  5. Not worry about it at all because it won't make any noticeable difference to the signal.

I know that the comprehensive answer to this question is to use a simulator. However, I haven't found a simulator within my budget as an individual. There are free 2D simulators out there, but I don't think a 2D simulator will help me in this scenario.

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You can always make the traces 10mil right after they leave the esd diodes, that's what I do, route 10mil as close as you can to the esd diodes, end that trace, now continue where you left off but now hit shift-w I think, and select 6mil trace width and carry on the last 1/8" or so to the esd diodes. 120ohms isn't that much of an impedance mismatch if you've only got a short length, you think the 1/16" bond wires in the chip (U9) are 100 ohms differential? transmission line effects can often be ignored when the discontinuities are less than 1/10 of a wavelength (include up to the 5th harmonic to be safe, so bandwidth in gbits/2*5 = 5th harmonic frequency (in ghz), speed of light/frequency = wavelength, if your discontinuity is less than 1/10 of a wavelength (1/20 is even better) then you probably don't have much to worry about. 120ohm lines wouldn't be a major issue unless the entire HDMI cable was 120 ohms, even then it'd probably still work as a lot of HDMI receivers now have cable equalization anyway which partially compensates for cabling oddities.

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  • \$\begingroup\$ I've seen lots of mention about ignoring discontinuities as long as they're less than 1/10th the wavelength. HDMI 1.3 can run at 340MHz, so 1/10th its wavelength is about 3.5 inches. On the flip side, however, I've read app notes that talk about techniques to prevent impedance mismatch for very small features - far less than 3.5 inches. Why do they bother? Are there two opposing schools of thought? \$\endgroup\$ – Dan Laks May 14 '16 at 1:22
  • \$\begingroup\$ I'm no expert but I imagine that it's good engineering to see that your design complies as much as possible with the spec. I agree with Tom about short sections out of spec being harmless (think about the very input pins of the IC!) but if you keep adding up small deviations at the end you get a big deviation. The point is that your deviations plus the connectors' deviations plus the cable's, and the equipment on the other side's add up, you need to still be within your error budget. \$\endgroup\$ – Guillermo Prandi May 14 '16 at 3:00

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