I only learned about the ideal integrator design (top circuit), but when I searched for a practical model for an integrator I found it was like the one in the bottom circuit.

Two new elements, Rf and Rs are added to the ideal model. I don't quite follow what their functions are. It would be great if someone can explain what they do and how large their values should be set compared to R1. Thank you.

(I've only just learned about op amps, so I may not understand complicated concepts.)

Ideal integrator, practical integrator

  • \$\begingroup\$ You are learning about integrators before inverting/non inverting gain ? \$\endgroup\$ – efox29 May 16 '16 at 5:10
  • \$\begingroup\$ I never said integrators are the first thing I learned. Of course I covered inverting and noninverting amplifiers before this. \$\endgroup\$ – HelperKing May 16 '16 at 5:27
  • \$\begingroup\$ So if C wasn't there - what does the the topology look like - what does the circuit do then ? \$\endgroup\$ – efox29 May 16 '16 at 5:30
  • \$\begingroup\$ Rule of thumb: any capacitor is an open circuit at low frequency, and a short circuit at high frequency. Analyze both before you try to figure out the mid-range. \$\endgroup\$ – Ben Voigt May 16 '16 at 5:37
  • \$\begingroup\$ Assuming C is an open circuit (C is not there), the above is an inverting amplifier with gain of -Rf/R1. When C is a short circuit, it becomes a voltage follower. Thanks for your help, but I still don't see what they do. \$\endgroup\$ – HelperKing May 16 '16 at 5:42

The practical integrator tries to compensate for two effects in non-ideal opamps:

Opamps have an input offset voltage \$V_{os}\$ that is due to transistor mismatch inside the opamp circuit. The easiest way of modelling the effect of this is to pretend that there is a DC voltage source in series with the + input of the opamp, equal to the voltage mismatch value.

With the ideal integrator, it will integrate this DC value up to the point that the opamp saturates, and the circuit is now useless until the capacitor is discharged.

With the practical integrator, \$R_f\$ turns the integrator into a low-pass filter with 3dB point (or cutoff frequency) of \$\frac{1}{2\pi R_f C}\$ (Hz). This means that frequencies far above this cutoff frequency (say 5x to 10x higher) will integrate perfectly, like expected. Frequencies below this cutoff, at steady state, will only see a gain (amplification) of \$R_f/R_i\$ (this is at steady state: to come back to our DC offset voltage, which is a DC value or 0 Hz frequency component, when you power on it'll start integrating normally, but slow down as it integrates and stop when it's been amplified by the gain).

Opamps have a bias current into or out of their two input pins. We call this value the input bias current, \$I_B\$, and it is DC. If you put a resistor at one input of the opamp, the bias current creates an input voltage that affects the opamp circuit's output. This is a DC error or DC offset at the output that is unwanted.

The resistor \$R_s\$ should be chosen so that the equivalent resistance looking out of the noninverting opamp input and inverting opamp input are equal. That way, the DC bias current into both inputs affect the + and - inputs equally, and they cancel out, leaving the output unaffected by the bias currents.

But the two currents into the input pins aren't equal (transistor mismatch rears its ugly head again). We call the difference between the two the input offset current, \$I_{os}\$. The difference is usually a lot smaller than the bias current, so doing this equivalent resistance matching at both opamp inputs still reduces the offset due to bias considerably.


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