I've read that it's best to use several MLCC caps with different values to filter out as much the varied frequency noise as possible.
On the output of the voltage regulator, I see some noise in the 100MHz frequency that I would like to filter out. According to datasheet, this noise is expected as a side effect of the switching effect of switching transistors inside the switching regulator (fsw = 1.5MHz). The 100MHz noise is associated with the switch-node ringing resulting from the parasitic inductances and capacitances.
What should I look for in an MLCC that would best filter out this 100MHz noise as much as possible?
I already have 10uF and 0.1uF caps, and considering adding a 3.9nF cap. The 3.9nF was selected since I see this cap has the lowest ESR and lowest Z at the 100MHz frequency. (The ESR and Z graphs show a V that hits about 100MHz at the lowest point).
Would this be a suitable capacitor to filter out the 100MHz noise?
What impact if any would the SRF (self resonance frequency) would have on the output, and should I be concerned with this? It appears the SRF of this capacitor would be around 100MHz (as the f where Z == ESR is 100MHz).
If I go even lower in value such as 3.3nF, the SRF shifts higher, but I will gain a higher ESR and Z at the frequency I'm trying to filter out.
What's the best way to select MLCC values?