I have made a logic expression for the J2 input of a JK flipflop using truthtable and karnaugh map (see truthtable below), but now I want to rewrite it using boolean algebra to get an expression that only includes NAND-ports


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(1st expression is the one that needs to be simplified, 2nd expression is the solution)

EDIT3: found this expression and circuit, can anyone confirm that this is the most optimal NAND-gate solution (least ammount of gates)?

enter image description here

  • \$\begingroup\$ Have a go at drawing out the circuit - and think about how you might make an inverter from a nand gate. \$\endgroup\$
    – stefandz
    May 16, 2016 at 13:18
  • \$\begingroup\$ @stefandz I tried (see picture above), the solution should include 6 nand gates, but I keep getting 7 of them \$\endgroup\$
    – Arthur VP
    May 16, 2016 at 13:54
  • \$\begingroup\$ I am slightly confused by your original equations by the way (they aren't labelled as I would expect) - could you draw out the truth table that you think applies to the system and define the inputs? For example, I would expect a J-K FF to have inputs labelled J, K and outputs labelled Q and Q'. What are A1, A2 and Q1 here? \$\endgroup\$
    – stefandz
    May 16, 2016 at 14:12
  • 1
    \$\begingroup\$ You missed a simplification before you converted to OR to NAND. What do the first two terms have in common? \$\endgroup\$ May 16, 2016 at 14:16
  • \$\begingroup\$ Memories and boolean logic are not compatible(as in you can't design a latch/flipflop with boolean logic expressions) anyways. the expression should be (A1 NAND Q )NAND A2 \$\endgroup\$
    – user55924
    May 16, 2016 at 14:40

2 Answers 2


I am going to work through this to the best of my ability - according to the excellent hint in the answer from Tom Carpenter's answer.

We start with

\$X = A_2 \overline A_1 + \overline Q_1 A_2 + Q_1 \overline A_2 A_1\$

which we can write as

\$ X = A_2(\overline A_1 + \overline Q_1) + Q_1 \overline A_2A_1 \$

and hence

\$ X = A_2(\overline{\overline{\overline A_1 + \overline Q_1}}) + Q_1 \overline A_2A_1 \$

then we can remove line redundancy and apply de Morgan's rule

\$ X = A_2(\overline{ A_1 Q_1}) + Q_1 \overline A_2A_1 \$

now add two more bars over the entire statement

\$ X = \overline { \overline { A_2(\overline{ A_1 Q_1}) + Q_1 \overline A_2A_1 }}\$

and then reapply de Morgan's rule

\$ X = \overline { \overline { A_2(\overline{ A_1 Q_1})} \cdot \overline {Q_1 \overline A_2A_1 }}\$

We can then draw this out as:


This is just 5 gates, and going through the truth table seems to show that the functionality is as required.


There are more ways of simplifying things than just de Morgan's rule.

Just like in multiplication/addition, there are also associativity and commutatively rules, for example:

$$A + B + C = (A+B) + C$$ $$A\cdot C + B\cdot C = C\cdot(A+B)$$

If you use those relationships in your simplification you do indeed end up with only 6 gates. It may be possible to get fewer still with care (seems 5 is possible from the comments).

Hint: What do the first two terms of the original expression have in common?

  • \$\begingroup\$ Thanks, your hint simplified it some more, but now I end up with 5 gates, did I miss something? \$\endgroup\$
    – Arthur VP
    May 16, 2016 at 14:49
  • \$\begingroup\$ I end up with 5 gates too, and I am happy that matches the original equation truth table... \$\endgroup\$
    – stefandz
    May 16, 2016 at 16:32
  • \$\begingroup\$ It's entirely possible you got 5, I didn't spend a much time trying to simplify it beyond 6. \$\endgroup\$ May 16, 2016 at 16:33

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