Following on from this question:

I have the task of setting a voltage V_set using PWM. The challenge arises from the fact, that V_set is referenced to a different ground than the MCU.

My currently best solution is the following.

enter image description here

Can somebody suggest improvements? I am particularly always happy to simplify things when possible...


I realise that the first opamp may oscillate a bit during slow transitions. My feeling is that this would be acceptable, since it will be filtered by C1.


  1. How small can I make C1 before I run into problems? (I was considering R3=1M & C1~160pF.)
  2. In the context of this circuit, is there any real advantage to capacitively decoupling the reference voltage of the first opamp? (Lower leg of voltage divider.)
  3. No I really need R4 & R5? (Then V_CB could reach -7V.)
  • 1
    \$\begingroup\$ You realize that your 2nd op-amp has positive feedback? what's the point of R3/C1 160usec time constant? \$\endgroup\$ – Spehro Pefhany May 18 '16 at 18:20
  • \$\begingroup\$ The second op-amp could be omitted. If R4 = 3.3K and R5 = 2.2K that would be fine. \$\endgroup\$ – user105652 May 18 '16 at 23:28
  • \$\begingroup\$ @Sparky256 How would I then incorporate the feedback? \$\endgroup\$ – ARF May 19 '16 at 6:16

Using an opto coupler is going to give asymmetrical rise and fall times at just ambient temperatures and if your PWM frequency is anything above 1 kHz, this will produce a clear duty cycle error i.e. a PWM error. Look at the data sheet for the device.

In conjunction with an LM324 op amp acting as a comparator you will accumulate more rise and fall errors but probably not as bad as the basic opto coupler so I would suggest faster devices if you are in the kHz switching range.

The 2nd op-amp that works in conjunction with the BJT is highly likely to oscillate because you are adding significant gain in the feedback path due the the BJT. At best it will be sometimes stable and sometimes oscillatory.

My best advice is for you to obtain a free copy of LTSpice and simulate it.

The impact of the rest of your questions are largely defeated by my concern over the choice of technique/components.

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  • \$\begingroup\$ Thanks Andy. I feared that the transistor might be an issue. I was considering connecting the output of the opamp directly to the V_set node but feared that I might accidentally inject 12V into a 5V circuit. Unfortunately I do not have access to the 5V rail to drive the second opamp. What it the best solution here? A regulator to make a dedicated 5V supply for the opamps? \$\endgroup\$ – ARF May 18 '16 at 12:32
  • \$\begingroup\$ I would consider making it into a PNP emitter follower wrapped around the op-amp - no need to swap anything on the op-amp inputs (you got the inputs back to front anyway if you were trying to make it work). This basically gives a potentially biggish current boost to the op-amp output but other than that it is a unity gain amplifier. \$\endgroup\$ – Andy aka May 18 '16 at 12:44
  • \$\begingroup\$ I simulated the circuit and see what you were predicting. My problem with the PNP solution is that with a single supply voltage driving the opamp, V_set cannot get down to 0 but the minimum hovers at about 0.8V. Hence my original choice of NPN... Should I keep the NPN and put in a RC filter before the base to avoid the instability? \$\endgroup\$ – ARF May 18 '16 at 15:30
  • \$\begingroup\$ Thinking about this an npn emitter follower should do the trick. Try simulating that. You'll still need a pot divider the ensure the base can fall to 0.7 volts unless you use a series diode from opamp output. Collector needs to be connected to an appropriate power rail such as 5 volts. Please exhaust this idea before trying much more unstable solutions. \$\endgroup\$ – Andy aka May 18 '16 at 16:30

Why not try one of Analog Devices magnetic isolated gate drivers? They can generate an isolated PWM signal directly.





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