I want to use a microcontroller from NXP to generate a SWD (Serial wire debug) serial signal. A SWD signal is a clock and a host to target header, a single cycle wait period, followed by either a host to target or a target to host reply. It looks ALMOST exactly like a I2C signal, but I need to be able to transfer more than 14 or 28 bits (I forget exactly) after the header is transfered. The docs for the NXP uC I looked at had a hard limit on the number of bits that could be transfered after the header data. A simple RS-232 could do it by connecting the data wire to both Rx and Tx, but I also need a clock line.


It sounds like what you want is what is known as Bit Banging. This is where you use one or more general purpose IO lines to emulate something like I²C, SPI, RS232 or whatever else you like, purely using software.

While this gives you the ultimate in flexibility, it does tend to tie up the microcontroller while any transfers are going on.

If speed isn't too much of an issue you could tie the transfer of data to a timer interrupt - transferring 1 bit every 10µS or something.

So, transferring a bit with an active low clock would go something like:

  1. Drive signal line to level of bit to transmit (high or low - 1 or 0)
  2. Drive clock line low
  3. Delay
  4. Drive clock line high
  5. Delay
  6. Progress on to next bit until done.
  • \$\begingroup\$ that could work. I don't mind using the CPU for the duration of the transfer. the GPIO pins on the NXP controllers I'm looking at can interface with DMA...but I haven't figured out if I can simultaneous transmit and receive. I think I'll need to read the manual a bit more for that. \$\endgroup\$ – Chris H Dec 12 '11 at 19:59

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