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The ATtmega128rfa1 works as master and Si8902 works as slave that is okay.

But when a request is given Si8902 takes 8us to reply back with the ADC data. How can master wait for 8 us. How to synchronize both the sides. Since the clock is generated by master, only when there is a data out. If dummy data has to be send. How to wait to till 8us. Using a timer interrupt here does not makes much sense?


Updated to clarify (copied from comments):

my question is at what instance the clock is generated? -master generate clock but when? - when you write some thing on MOSI. Okay What happens during read, How will master know that it should generate clock after 8 us.

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    \$\begingroup\$ As the datasheet say: "The master must wait 8us". Thus the master. Wait for it. Must wait 8us. So you wait, for 8us. \$\endgroup\$
    – Asmyldof
    May 24, 2016 at 22:17
  • \$\begingroup\$ How to sync clock with with slave. \$\endgroup\$
    – Jagadesh
    May 25, 2016 at 13:12
  • \$\begingroup\$ @Jagadesh - Why are you asking "how to sync clock with [the] slave"? That is not how SPI works. The SPI Master outputs the clock, without the SPI Slave providing anything to "sync" to. The SI8902 datasheet seems clear on the requirements about how you need to interface to it. Perhaps you want to research more about SPI? If you can update your question at the end, to describe the specific part of the datasheet that you don't understand, then perhaps someone will be able to help you (don't just add comments here!). \$\endgroup\$
    – SamGibson
    May 25, 2016 at 19:50
  • \$\begingroup\$ my question is at what instance the clock is generated? -master generate clock but when? - when you write some thing on MOSI. Okay What happens during read, How will master know that it should generate clock after 8 us. \$\endgroup\$
    – Jagadesh
    May 25, 2016 at 21:16
  • \$\begingroup\$ @Jagadesh - You didn't update your original question with the clarifications, as I requested [I will do that job for you], but I have written an answer for you anyway :-) \$\endgroup\$
    – SamGibson
    May 25, 2016 at 22:54

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my question is at what instance the clock is generated? -master generate clock but when? - when you write some thing on MOSI.

Yes, the clock must be generated by the SPI Master (this is done automatically if you use the SPI module of your ATmega128) when data is written to the SPI Slave. See below about reading from the SPI Slave

Okay What happens during read,

The typical approach with the SPI modules in many MCUs, is for the SPI Master to be used to send dummy data (and therefore generate the SPI clock signal) in order to receive data from the SPI Slave.

If you were "bit-banging" the SPI bus at the SPI Master, then you could just toggle the SPI clock signal the required number of times, in order for the SPI Slave to send you data on the MISO line (i.e. to read from the SPI Slave).

How will master know that it should generate clock after 8 us

The SPI Master does not automatically "know" that it needs to generate the clock no sooner than 8uS after it has sent the Si8902 Command Byte. This level of detail varies between different SPI Slaves and cannot be automatically "known" by an SPI Master.

However you know this timing requirement (after reading the Si8902 datasheet) so therefore you need to include that delay in the program which you write on the SPI Master device (as @Asmyldof mentioned in an earlier comment).

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