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I need to test a differential ADC (with AIN and /AIN).

After some tests, I don't understand the behavior.

Let's use the AD6644 (taken from this Analog devices document):

As shown in the functional block diagram, the AD6644 has complementary analog input pins, AIN and /AIN. Each analog input is centered at 2.4 V and swings ±0.55 V around this reference (Figure 21). Because AIN and AIN are 180° out of phase, the differential analog input signal is 2.2 V peak-to-peak.

Does this mean I cannot feed AIN or /AIN with a voltage higher than 2.95v (2.4+0.55) or lower than 1.85v (2.4-0.55). Then the input range is 1.85-2.95v. What is the behavior if I put /AIN at ground (0V) and the AIN input signal at 2.4v +-0.55v ?

EDIT:

Maybe my misunderstanding comes from the board I am using. This board doesn't contain any differential output opamp and contains only two different signals for feeding AIN and /AIN. With the possibility to set one or both inputs at 2.5V DC. It uses the ADC with no AC-coupled inputs... just as a "differential" (AIN - /AIN) ADC...

Obviously, the board uses this diff ADC as a single-ended ADC.

Does the input offset of the signal matter or not ?

A) /AIN=0V AIN=SINE 0v offset, 2.2V p-p
B) /AIN=2.4V AIN=SINE 2.4v offset, 2.2V p-p

A and B are supposed to give the same result. Aren't they ?

Or A doesn't work or is not efficient because doesn't respect the 1.85-2.95v input range.

And AIN and /AIN AC-coupling at 2.2v p-p with 0V offset AND 2.4V offset (or any other offset) are behaving same ? Only the 2.2v p-p does matter or the 1.85-2.95v input range too ?

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Yes, the AD6644 has a differential input stage. Citing its datasheet, the maximum damage free input voltage is your analog supply voltage. Which doesn't mean that's the maximum usable voltage, i.e. a point that isn't already clipping. That would be, as per the datasheet, p.3 a 2.2V betweeen AIN and /AIN.

To stress this further (emphasis by me):

The AD6644 input voltage range is offset from ground by 2.4 V. Each analog input connects through a 500 Ω resistor to a 2.4 V bias voltage and to the input of a differential buffer (Figure 21). The resistor network on the input properly biases the followers for maximum linearity and range. Therefore, the analog source driving the AD6644 should be ac-coupled to the input pins.

In other words: you don't use a 65MS/s ADC to measure a DC voltage. You use it with capacitors in series to its inputs, and the ADC itself establishes the 2.4V bias. It doesn't really matter what absolute voltage offset your analog signal has – that offset doesn't pass through the capacitors – it's only important that the peak-to-peak voltage doesn't exceed 2.2V.

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  • \$\begingroup\$ Means I can feed the ADC with two sinewaves at 0V offset 2.2v pk-pk and 180° shifted ? The signal will be a sinus from -1.1v to 1.1v. That's the things difficult to understand (the internally 2.4V bias). Maybe this is just the board I am using which makes me misunderstand. (There is no Diff output opamps) Thank you for you reply. \$\endgroup\$ – Alexis_FR_JP May 28 '16 at 23:16
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You are correct on the maximum input range for valid conversions.

Because the internal ADC is differential, if you put the \$\overline A_{in}\$ at 0V, I would expect the Overrange bit to assert.

AD6644 Pin functions

If you wanted to operate this in a single ended input manner, then I would expect to need to set the \$\overline A_{in}\$ at 2.4V which is internally generated by the ADC, so you could just leave it floating (albeit with potential noies issues).

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  • \$\begingroup\$ Behind Marcus Muller said the DC offset doesn't matter, only the 2.2v p-p between AIN and /AIN does matter. With this assumption, I could set /AIN at the ground and AIN at a sinewave without offset and 2.2v p-p. \$\endgroup\$ – Alexis_FR_JP May 28 '16 at 23:21
  • \$\begingroup\$ I said the DC offset didn't matter because you should be AC-coupling the inputs! Not in general that DC offset doesn't matter! \$\endgroup\$ – Marcus Müller May 28 '16 at 23:27
  • \$\begingroup\$ I edited my post in order to be more precise. \$\endgroup\$ – Alexis_FR_JP May 28 '16 at 23:32

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