# Verilog - creating a timer to count a second [duplicate]

I'm using a FPGA (BEMICROMAX10) to create a digital clock using seven segment displays on a breadboard, and I'm having issues getting the seconds to count exactly 1 second. The clock system input I'm using is 50 MHz. I'm going to post just the relevant code to the seconds. The equation I used to determine N was (1/50000000) * 2^N = 1 which gave me 25.58, so when I use 26, it's just a tad slow, and when I make it 25, it's a little too fast. Any ideas how to correct this?

Thank you

module digital_clock(clk, segsec);
input clk;
output [13:0] segsec;

parameter N = 25;
reg [N-1:0] slow_clk = 0;
reg [7:0] countsec = 0;

always @ (posedge clk)
slow_clk <= slow_clk + 1'b1;

always @ (posedge slow_clk[N-1])
if (countsec == 8'b00111011) countsec <= 8'b0;
else  countsec <= countsec + 8'b1;

assign segsec = (countsec == 8'h0 ) ? 16'b01111110111111:
(countsec == 8'h1) ? 16'b01111110000110: //1        0000110     0111111
(countsec == 8'h2) ? 16'b01111111011011: //2        1011011
(countsec == 8'h3) ? 16'b01111111001111: //3        1001111
(countsec == 8'h4) ? 16'b01111111100110: //4        1100110
(countsec == 8'h5) ? 16'b01111111101101: //5        1101101
(countsec == 8'h6) ? 16'b01111111111101: //6        1111101
(countsec == 8'h7) ? 16'b01111110000111: //7        0000111
(countsec == 8'h8) ? 16'b01111111111111: //8        1111111
(countsec == 8'h9) ? 16'b01111111101111: //9        1101111
(countsec == 8'ha) ? 16'b00001100111111: //10
(countsec == 8'hb) ? 16'b00001100000110://11
(countsec == 8'hc) ? 16'b00001101011011://12
(countsec == 8'hd) ? 16'b00001101001111://13
(countsec == 8'he) ? 16'b00001101100110: //14
(countsec == 8'hf) ? 16'b00001101101101: //15
(countsec == 8'h10) ? 16'b00001101111101://16
(countsec == 8'h11) ? 16'b00001100000111://17
(countsec == 8'h12) ? 16'b00001101111111://18
(countsec == 8'h13) ? 16'b00001101101111://19
(countsec == 8'h14) ? 16'b10110110111111://20
(countsec == 8'h15) ? 16'b10110110000110://21
(countsec == 8'h16) ? 16'b10110111011011://22
(countsec == 8'h17) ? 16'b10110111001111://23
(countsec == 8'h18) ? 16'b10110111100110://24
(countsec == 8'h19) ? 16'b10110111101101://25
(countsec == 8'h1a) ? 16'b10110111111101://26
(countsec == 8'h1b) ? 16'b10110110000111://27
(countsec == 8'h1c) ? 16'b10110111111111://28
(countsec == 8'h1d) ? 16'b10110111101111://29
(countsec == 8'h1e) ? 16'b10011110111111://30
(countsec == 8'h1f) ? 16'b10011110000110://31
(countsec == 8'h20) ? 16'b10011111011011://32
(countsec == 8'h21) ? 16'b10011111001111://33
(countsec == 8'h22) ? 16'b10011111100110://34
(countsec == 8'h23) ? 16'b10011111101101://35
(countsec == 8'h24) ? 16'b10011111111101://36
(countsec == 8'h25) ? 16'b10011110000111://37
(countsec == 8'h26) ? 16'b10011111111111://38
(countsec == 8'h27) ? 16'b10011111101111://39
(countsec == 8'h28) ? 16'b11001100111111://40
(countsec == 8'h29) ? 16'b11001100000110://41
(countsec == 8'h2a) ? 16'b11001101011011://42
(countsec == 8'h2b) ? 16'b11001101001111://43
(countsec == 8'h2c) ? 16'b11001101100110://44
(countsec == 8'h2d) ? 16'b11001101101101://45
(countsec == 8'h2e) ? 16'b11001101111101://46
(countsec == 8'h2f) ? 16'b11001100000111://47
(countsec == 8'h30) ? 16'b11001101111111://48
(countsec == 8'h31) ? 16'b11001101101111://49
(countsec == 8'h32) ? 16'b11011010111111://50
(countsec == 8'h33) ? 16'b11011010000110://51
(countsec == 8'h34) ? 16'b11011011011011://52
(countsec == 8'h35) ? 16'b11011011001111://53
(countsec == 8'h36) ? 16'b11011011100110://54
(countsec == 8'h37) ? 16'b11011011101101://55
(countsec == 8'h38) ? 16'b11011011111101://56
(countsec == 8'h39) ? 16'b11011010000111://57
(countsec == 8'h3a) ? 16'b11011011111111://58
(countsec == 8'h3b) ? 16'b11011011101111://59
16'b01111110111111;
endmodule


## marked as duplicate by Chris Stratton, Daniel Grillo, placeholder, Dmitry Grigoryev, Voltage SpikeJun 9 '16 at 16:41

• Use a 26-bit counter to count to 26'd50_000_000, to generate a 1 second time base. Bring that 1 second clock out to an LED so you can verify. – MarkU May 29 '16 at 19:39
• Note that counting to 25M will only give you a 1s period if your 50MHz oscillator is in fact 50MHz. Which it isn't, but whether it's close enough is up to you to determine. – uint128_t May 29 '16 at 20:47

Instead of restricting yourself to use a power of two, count exactly until 50000000.

parameter N = 26;

....
always @ (posedge clk)
if (slow_clk == 26'd50000000) begin
countsec <= countsec + 8'b1;
slow_clk <= 0;
end
else begin
slow_clk <= slow_clk + 1'b1;
end


Or something like that

Use a 26 bit counter, company compare with 50000000, when it matches reset it and increment your seconds counter.