I'm trying to build a circuit for generating ADSR envelopes for use in an ananlog synthesizer, and a part of the circuit acting in a way I can't understand. Here is the part of the circuit that is giving me the problem (not the entire circuit):
simulate this circuit – Schematic created using CircuitLab
(If this looks like a strange circuit, remember that this is only the part that is not working, stripped to its most simple form.)
The first op amp is outputting around 7 V DC. The gate voltage of the mosfet is 0 V. My problem is this: as I increase the resistance of R3, the voltage across C1 increases (it very quickly approaches 7 V as R3 is increased to some tens of kiloohms), and this only occurs if the mosfet is connected (gate voltage at 0). If I remove the mosfet from my breadboard, then R3 does not affect the voltage over C1, it simply remains discharged as I want it to.
I really have no idea why this is happening. Is there something I don't know?