5
\$\begingroup\$

I have been working on a question which is: Design a synchronous up-counter that goes through the sequence 1 2 5 6 3 4 7 0 and then repeats. Implement the counter using D flip-flops.

So Far I have the managed to work out the following:

enter image description here

Is this correct?

Would it be correct to use this truth table instead of the previous one? enter image description here

\$\endgroup\$
  • \$\begingroup\$ Have you tried simulating it? \$\endgroup\$ – Tom Carpenter Jun 2 '16 at 15:58
  • 2
    \$\begingroup\$ It's close though. Your Kanaugh maps are right, but one of your equations from one of the Karnaugh maps is wrong. I'll let you figure out which... \$\endgroup\$ – Tom Carpenter Jun 2 '16 at 16:08
  • 3
    \$\begingroup\$ But for future reference, it is the job of your lecturer/teacher to mark your work, not us. \$\endgroup\$ – Tom Carpenter Jun 2 '16 at 16:09
  • 1
    \$\begingroup\$ But to test it you can actually use some simulator. There are several pretty good ones and free. And easy to use. \$\endgroup\$ – Eugene Sh. Jun 2 '16 at 17:27
  • 3
    \$\begingroup\$ +1, for once, a student not directly putting a scan of the problem statement without further research, that deserves an upvote. \$\endgroup\$ – dim Jun 2 '16 at 18:10
1
\$\begingroup\$

If your teacher asked to design this with only D flip flop , I don't know is it possible of not, But using 3 D flip flop and a 2 half adder (or 1 full adder) , you can easily design it. if you look closely , your LSB bit ( "C" ) just flipped in every clock cycle and AB is just the value of "AB+C" bits.

schematic

simulate this circuit – Schematic created using CircuitLab

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.