A common mode gain is the result of two things. The finite output resistance of the current source (M5) and an unequal current division between M1 and M2.
The finite output impedance is a result of the transistor's output resistance rds and the parasitic capacitors at the drain of M5. The result is that any change of the common voltage results in a change of ISS.
Assuming only a common mode voltage and no differential voltage the change of the current ISS splits between M1 and M2. In practice M1 and M2 are slightly different due to mismatch, the current won't split equally and a differential current results that is converted into an output voltage.
Even for perfectly matched transistor a slight imbalance can be found, M1 has a diode-connected load and M2 has a current-source load. The impedance when looking into the sources of M1 and M2 will be slightly different due to this asymmetry. Again a differential current will result.
Update: In some textbooks the common mode rejection is derived for a fully
differential structure with perfect matching. Then the common-mode
rejection is calculated as the ratio of common-mode ouput to
This gives the well known result Acm ~ RD / (2 rds5)
The circuit shown in your post is singled ended and therefore another
approach is required.