# I2C ideal pull-up resistor calculation

As part of a test i was given the following question:

My attempt gave an incorrect answer. The "correct" answer is 1000 ohm but i am having trouble figuring out why. My interpretation; min value is: $$R_p = (V_{dd}-V_{OL})/I_{max} = 9.67 ohm$$ $$R_p = (3.3-0.4)/0.3 = 9.67 ohm$$ This will give the fastest rise time but max current, question asks to minimise current so i should aim for the slowest allowable rise time. $$T = 1/f = 1/100k = 10us$$ minimum hold time is the minimum time during a period that the signal must be held high to correctly trigger the logic level. Therefore $t_2$ from the graph is: $$t_2 = T - t_{hold} = 10us - 300ns = 9.7us$$ using the value given in the graph for logical high threshold: $$V_{IH} = 0.8V_{dd} = 0.8*3.3 = 2.64V$$ substituting these values into the given equation to find R $$v(t) = V_{dd}(1-e^{-t/RC})$$ $$2.64 = 3.3(1-e^{-9.7u/R(200p)})$$ $$R = 30.13k$$ closest E24 value being 30k (rounded down as 30.13k is the maximum) This is a great deal different from their answer of 1k, my question is where have i gone wrong? i feel like i have misintepretted the hold time or need to use the $V_{IL}$ value somewhere?

Hold time is the amount of time for which the signal must be stable after the clock edge. When the signal is low and starts rising on a clock edge it must not cross VIL for 300ns. You have $$0.8 = e^{-300ns/(200pF R)}$$
However, that still does not give you the correct answer. I had a look at the I2C specification here. Interestingly, 300ns only appears as the rise time requirement when you are in fast mode, which is the mode for 400kbps. The time it takes for the signal to rise to VIH is: $$0.2 = e^{-300ns/(200pF R)}$$ Solving for R $$R = \frac{-1}{\ln 0.2} \times 300ns / 200pF\approx 932 \Omega$$