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This question already has an answer here:

Wondering why you would choose to use smaller capacitors in parallel vs one bigger one. Here's an example:

Multiple in Parallel

Page 4: One larger C

Is this a component size and track width choice? Thanks!

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marked as duplicate by placeholder, uint128_t, The Photon, Nick Alexeev Jun 8 '16 at 3:46

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  • \$\begingroup\$ This is speculation on my part, but perhaps reliability could also play a factor. It depends on the failure mode of the cap, but perhaps if one one of three capacitors fails as an effective open circuit, the remaining two of three capacitors could function acceptably, if not necessarily idealy. \$\endgroup\$ – Dan Jun 7 '16 at 23:12
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    \$\begingroup\$ Dave Jones did an entire program on this exact question: eevblog.com/2015/05/09/… \$\endgroup\$ – Richard Crowley Jun 8 '16 at 1:55
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A couple reasons come to mind.

  1. Lower ESR. The effective ESR of the capacitors follows the parallel resistor rule. For example, if one capacitor's ESR is 1 Ohm, putting ten in parallel makes the effective ESR of the capacitor bank ten times smaller. This is especially helpful if you expect a high ripple current on the capacitors.

  2. Cost saving. Let's say you need a large amount of capacitance. A single large capacitor might be more expensive than several smalls ones that add up to the same amount.

  3. Filtering. Capacitors of different values have different impedance characteristics as a function of frequency. If you're trying to filter out a range of frequencies (noise, EMI, etc), it's helpful to put a range of different capacitors next to each other to present low impedance to as much undesirable frequencies as possible.

  4. Stock availability. Distributors don't carry every possible value of capacitance. You may need to combine multiple caps that add up to a specific capacitance you need.

  5. Board Layout. The physical constraints of the PCB or enclosure may allow multiple small parts to fit where a single large part will not.

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  • \$\begingroup\$ Since this appears to be a direct replacement of one 10uF cap with seven 10uF parallel caps, I would have to imagine 2, 3, and 4 are ruled out here. \$\endgroup\$ – jgaro Jun 7 '16 at 23:19
  • \$\begingroup\$ 5. Board Layout. The physical constraints of the PCB or enclosure may allow multiple small parts to fit where a single large part will not. (also ruled out if replacing one 10uF with seven). \$\endgroup\$ – Mark Jun 7 '16 at 23:46
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    \$\begingroup\$ 6. Packaging Style. A design may require something like a 120 uF cap but the design must be done with all very low profile SMT components. (Try to find an SMT multilayer ceramic cap of 120 uF for any reasonable price; if at all). \$\endgroup\$ – Michael Karas Jun 8 '16 at 3:07
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One reason may be that 10 uF capacitors are common. So, for instance, if you need a 30 uF capacity, it's easier to implement it using three 10 uF capacitors in parallel, rather than a single 30 uF capacitor (less common).

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  • \$\begingroup\$ Thanks- I had that thought as well, but there are a bunch of 10uF caps replacing the 27pF cap in the datasheet. I think that the cap value between power and ground can be larger than listed, but I'd think that just a 10uF would be fine to replace a 27pF cap? \$\endgroup\$ – jgaro Jun 7 '16 at 22:35
  • \$\begingroup\$ Which 27pF cap are you seeing that is being replaced with 10uF caps? The only 27pF cap I see is a suggested filter cap on the feedback network. \$\endgroup\$ – Dan Laks Jun 7 '16 at 22:49
  • \$\begingroup\$ You're right, I read the schematic incorrectly. They're replacing 1 10uF cap with seven 10uF caps in parallel. \$\endgroup\$ – jgaro Jun 7 '16 at 23:18
  • \$\begingroup\$ Making physically small surface mount multilayer ceramics that hold their value when used at more than a few volts gets very hard - so it may not just be that 10 uF are more common, they may be close to the largest effective value readily available in a given package (though that effective value could turn out to be well less than 10 uF each) \$\endgroup\$ – Chris Stratton Jun 8 '16 at 2:34

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