2
\$\begingroup\$

I am working with a Cyclone V GX starting board. It has 4mb of external SRAM. I have written a very simple memory interface for accessing it. That works.

Now I would like to load a raw (hex?) file into the external SRAM on my board for my FPGA to work with. Is there an easy way to accomplish this via Quartus II?

edit:

I am not looking for a way to program my FPGA (by loading a design), this is clear to me. My FPGA has already has my micro-controller design loaded. Now I want to load a program (in the form of raw data) for it into the external SRAM on my board.

\$\endgroup\$
  • \$\begingroup\$ In theory a programming tool connected to the FPGA via jtag could use boundary scan functionality to wiggle the FPGA's I/Os and thus write to an external SRAM connected to it. In practice, that will be painfully slow, and it would be much more efficient to load a design fragment into the FPGA fabric which can accomplish this in a more efficient manner, possibly using some other interface to bring the data over from the PC. Have you considered adding an SPI port, or an SD card socket, or seeing if you can append data to the configuration flash and copy it from there to the RAM? \$\endgroup\$ – Chris Stratton Jun 9 '16 at 7:47
  • \$\begingroup\$ Please post the model number of your dev board. \$\endgroup\$ – user2943160 Jun 9 '16 at 14:53
1
\$\begingroup\$

The "Control Panel" application provided by the actual manufacturer (Terasic) should let you do this: Cyclone V GX board

\$\endgroup\$
  • \$\begingroup\$ that requires the FPGA to have the control panel design file loaded, doesn't it? I need to have my own FPGA design loaded and give it some data to work with. \$\endgroup\$ – ErwinM Jun 9 '16 at 7:20
  • \$\begingroup\$ You can load the control panel design file first to load the SRAM (the control panel itself will automatically use the JTAG dlls to do so). After you program the SRAM via the control panel, you can then load your FPGA design through the usual Altera tools. The SRAM should be fully static, so there is no problem doing so and the contents should be preserved so long as you do not remove power to the board. \$\endgroup\$ – Zuofu Jun 9 '16 at 8:29
1
\$\begingroup\$

No, it is not possible to access the SRAM of the Cyclone V GX Starter Kit directly from Quartus II. From page 37 of the User Manual, the SRAM is only connected to the FPGA. Thus, the user application in the FPGA will need to be responsible for writing the desired data into the external memory.

As mentioned by Zuofu, the Terasic "C5G Control Panel" can access the SRAM for you, allowing single-word R/W access or doing R/W to/from a file. This uses the Terasic custom user application to send data using JTAG into a Nios II program implementing a SRAM interface. As mentioned in their later comment, since SRAM is fully static, you could load your HEX file using the Control Panel, then reprogram the FPGA using Quartus II with your own application. With the board powered on continuously, the SRAM contents will still be available for your application to access.

The trick won't work for the larger LPDDR2 because, as a dynamic memory, reprogramming the FPGA would leave the device without a controller to complete refresh cycles in the memory. Thus, you would expect memory corruption to occur.

To include this sort of feature in your own application, you would have to implement both ends of a JTAG communication system to move data to/from your computer and onto the FPGA for sending to the SRAM.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.