4
\$\begingroup\$

Is it safe to use "weak" signal declarations in VHDL?

There are the signals 'H' 'W' and 'L', that act as logic declarations, but which can be overridden by strong signals like '1' and '0'. I assume these are meant to mimic pulldown or pullup resistors.

I want to have a register that can switch directions, so I used inout for the input and output ports, and 'W' for the input side.

So, for example, when the direction port reads low,

input <= 'W'; output <= input;

and when direction is high,

input <= output; output <= 'W';

that way, when input is 'W', if the port is driven high, with a logical '1' from the external port, that overrides the 'W' and if it's low with a '0' that overrides the 'W'. I did this because otherwise there's a conflict of multiple drivers.

My questions is, is this allowed? Technically the behavioral simulation works out like I want, but I know VHDL being syntactically correct doesn't necessarily mean it would work on an FPGA. Does PL fabric support this?

\$\endgroup\$
  • \$\begingroup\$ Depends on the FPGA. Some might support weak signals, many don't. It would help to know what you are trying to accomplish that requires them. \$\endgroup\$ – Tom Carpenter Jun 9 '16 at 14:22
7
\$\begingroup\$

No, this is not safe behavior. The weak signals are intended for simulation, and during synthesis they are interpreted as strong signals. After all, you need the physical resistor to be there, and FPGAs only have internal pull-up resistors on the I/O pins.

\$\endgroup\$
  • \$\begingroup\$ Ah, ok. Got it. Glad I asked before I tried programming a thing. \$\endgroup\$ – Zephyr Jun 9 '16 at 14:34
  • \$\begingroup\$ Actually, second question. I tried something different where I connect the output of the register to a signal. When the direction is going one way, the output is set at 'Z', and the signal is also driven by an external '1'. However, during behavioral simulation, the output is a red 'X', for indeterminate. When I select report drivers, it says drivers are 0 and Z. Shouldn't that resolve appropriately to 0 instead of being a conflict? \$\endgroup\$ – Zephyr Jun 9 '16 at 14:51
  • \$\begingroup\$ @Zephyr I don't understand your setup. What value did you set the register and what value are you getting? You also say the signal is driven by an external 1. But that doesn't make sense for a register, because the register is an output. Do you mean a bidirectional port instead of a register? \$\endgroup\$ – user110971 Jun 9 '16 at 14:59
  • \$\begingroup\$ Please edit the original post if clarifying a question or open a new question if it's needed. Comments are not permanent and are thus a poor place for important Q&A. \$\endgroup\$ – user2943160 Jun 9 '16 at 15:01

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.