I have read datasheets on SRAM and Flash devices. They seem to have a "Hold" signal that can be used to prevent it from registering the input data/instructions until it the hold signal is deasserted. When would one need to use such a thing?
The 23LC1024 SRAM datasheet says: "The HOLD pin is used to suspend transmission to the 23A1024/23LC1024 while in the middle of a serial sequence without having to re-transmit the entire sequence over again"
These memory devices also have dual and quad SPI modes in which the hold signal is replaced with a data IO signal instead. This makes me think that the hold signal is not really important or is it?