How to decide and calculate parameters for track on differential pair?

Question

I am a bit lost about how to establish the parameters to establish differential pair routing. I am currently trying to route several differential pair and I am a bit new to this. I have searched online some tutorial but I don't find any really explaining easily and out of the theory with simple succession of steps about how to do it

I have downloaded saturn PCB software to see if it can help but I don't understand well how the soft is working because what it ask me to input is typically what I am searching for (it looks it is reverted... !!!)

Assuming the differential pair I am routing is requiring 90 ohm (this is what the hardware guideline say "Route the USB differential pair on the top layer with a trace width and differential spacing tuned to the PCB stack-up for 90Ω differential impedance ").

So in Saturn PCB I have indicated in target zdiff : 90 Conductor spacing: I don't know (Am I supposed to arbitrary settle this, then accomodate the other parameters ?) Conductor width: same Conductor height: this I suppose I need to check my layer stack up. In this case I suppose I have to decide the spacing between top track and ??? first prepreg or core ?

I would really appreciate if someone who have experience could explain their methodology via a "1./ 2./ 3./ 4./ points methodology" to be able to achieve any differential pair routing.

Answer 1

From the text, this appears to be a USB high speed interface.

The signal pair will have very little current, but you need to keep losses to a minimum.

The losses in high speed tracks are dominated by:

Skin Effect. This is because as signal transition rates become faster, the self-inductance of the conductor forms a high impedance in the centre of the conductor. A wider track reduces this loss (but it has diminishing returns above about 8 thou).

Dielectric absorption also causes losses. There is an excellent description of them here.

Another cause of losses is differential to common mode conversion, usually caused by a length mismatch between the pair.

The practical implementation of a controlled impedance pair depends whether you have a plane layer which is immediately below the signals; I will assume for now that you do and it is spaced 5 thou away from the signals (implies a 4 layer or higher PCB). The actual distance is determined by the various requirements of the PCB; a 5 thou core is commonly used (although many thicknesses exist).

I usually use 6 thou tracks for USB high speed (a decent trade-off for skin effect and PCB real estate); the gap between the pair can now be calculated by any number of tools.

For the geometry above, my calculations yield a trace separation of 4 thou using 1 ounce copper (commonly the finished thickness on outer layers).

If you do not have a plane layer, there are other techniques such as differential coplanar waveguide; just what technique I use is determined by the PCB geometries.

There is no one size fits all, but using a 5 thou to 6 thou track width as a starting point helps narrow things down.