To change the state of a single I/O output latch while leaving the others unaffected, it's necessary for the 8051 to read eight latches, change one of the bits, and write the result back. If that read operation were to report the state of the pin rather than the latch, then changing the state of one pin while another pin was being used as an input but pulled low would cause that other pin to start outputting low. Not fun.
Normally the need to use read-modify-write operations on the latch registers would be accommodated by using separate read addresses for the latches and the pin states. Because bit-addressable addressing space is at a premium (only 16 I/O registers can be bit addressable), the designers of the 8051 made it so that reading the ports associated with the general-purpose I/O (i.e. 0x80, 0x90, 0xA0, 0xB0) will sometimes yield the contents of the port latches (when using most read-modify-write instructions, including BSET, CLR, etc.) or the state of the pins (when using most input instructions, including JB, JNB, etc.). While it would sometimes be helpful to have a way of simply reading the state of the latch registers, the 8051 does not provide one; the only instructions that read the latch state are those which use the read value purely as part of a read-modify-write sequence.