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Why do ATmega (e.g. 328P or 644P) have CKDIV8 (or CLKPS = 0011) factory programmed along with a default internal 8 MHz oscillator?

From the 644P documentation: 6.12.2 CLKPR - Clock Prescale Register, Page 40:

The CKDIV8 Fuse determines the initial value of the CLKPS bits. If CKDIV8 is unprogrammed, the CLKPS bits will be reset to “0000”. If CKDIV8 is programmed, CLKPS bits are reset to “0011”, giving a division factor of 8 at start up. This feature should be used if the selected clock source has a higher frequency than the maximum frequency of the device at the present operating conditions. [...] The Application software must ensure that a sufficient division factor is chosen if the selected clock source has a higher frequency than the maximum frequency of the device at the present operating conditions. The device is shipped with the CKDIV8 Fuse programmed.

Is it just a precaution to ensure the CPU clock does not exceed say a 16 MHz limit when configuring the MCU to run with an external oscillator of too high frequency (and forgetting to change CLKPS accordingly). Or are there other reasons?

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Note the dependency of the maximum allowed clock speed on the supply voltage: E.g. the 644PV can only reach 4 MHz when running at 1.8V (similar for other chips)

If the controllers were programmed to a default 8 MHz you could not program them in a circuit running at such low supply voltage. 1 MHz is a safe default frequency that any AVR can reach at any supply voltage within its specifications.

You could change the internal oscillator to a 1 MHz one and leave the clock divider unprogrammed, but this forbids to run the controller at a higher clock rate without an external clock source.

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It's for out-of-the-box compatibility with and easy migration from the ATmega163, which only has a 1MHz internal RC oscillator (with other clock rates available via an external crystal or clock).

Of course, no one uses/should be using the '163 anymore this decade, but the legacy continues.

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    \$\begingroup\$ It seems very odd that such a legacy would come from a specific chip model, from which '328 isn't even a natural upgrade path. I don't know if '163 and '644 are binary compatible, but I couldn't find any mention of it in the '644 datasheet. To contrast, for example, '162 specifically has a '161 compatibility mode, the tiny25 range has a tiny15 mode and so on. The more likely explanation is that they standardized on 1 MHz to allow any device to be safely programmed under any permitted voltage. \$\endgroup\$ – nitro2k01 Jun 18 '16 at 11:30
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You can deduce it logically from a number of parameters, all which have to do with guaranteeing that the chip can be programmed safely under all allowed voltage conditions, from the factory settings.

  • AVR devices require a valid clock to be programmed. If you want to use the RC oscillator, you shouldn't have to add a crystal or external clock signal just to program the device. Conclusion: The fuse bits must be programmed to run the chip from the RC oscillator from factory.
  • The RC oscillator should calibrated at a fast enough value to be generally useful, while having a good enough precision. Atmel probably decided at some point that 8 MHz was an optimal point. Conclusion: 8 MHz was chosen as the calibration point for the RC oscillator in most AVR devices.
  • Not all devices can run at 8 MHz under all voltage conditions. Conclusion: Atmel standardized on dividing the clock by 8, which yields a 1 MHz clock, which is safe for any device.

There may also be a value in standardizing on a single frequency across all devices, which seems to be the case, even if it may not be strictly required for some of the devices.

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