I've connected a 6V DC voltage source via a 1Ω resistor to a 1F capacitor. I was expecting the simulation to reveal a less constant t-vs-v graph: it would start at 0 and after a while stabilize at 6 volts. But it seems that the voltage across the capacitor begins at the source level and remains so. Two questions:
- Why is the voltage across the capacitor constant for the 10 seconds?
- (Secondary) Why isn't the current through the resistor I = V/R = 6/1 = 6 A (at least while the capacitor is being charged)?
I'm making my first steps in electronics. Any feedback would be very helpful to me.
Solution. Thanks to everyone for the feedback. Lack of reputation doesn't allow me to upvote them, but all were very helpful to me. Turned out that I didn't check "use initial voltage", so while the initial voltage of the cap was set to 0, it wasn't being used:
Circuit designed and simulated using SystemVision.