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I have a host of differential signals from a board thats 3.3V. Now, I need to interface it to a board that can accept 2.5V. Now, is it possible to use a standard level shifter like this ?

Is there any effect on the impedance and will there be any impedance mismatch ? If so, how can I add any passives to compensate for it in case of any impedance mismatch issues ?

Finally, there are some clock signals that need the same level shifting. Can such standard level shifters be used as long as the slew rates and the frequency is not compromised ?

Now, my clock is going from one board to another board. And I foresee a degradation of the performance. How can I rectify that ?

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    \$\begingroup\$ Define "high speed". 10MHz? 100MHz? 1GHz? 10GHz? \$\endgroup\$ Jun 23 '16 at 3:35
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    \$\begingroup\$ For impedance, consider the level shifter input the end of the line for the 3.3V signal (match about input impedance if needed). Then consider it the start of the line for the 2.5V signal. \$\endgroup\$ Jun 23 '16 at 3:37
  • \$\begingroup\$ Could you kindly clarify the 2nd comment please ? \$\endgroup\$
    – Board-Man
    Jun 23 '16 at 3:38
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    \$\begingroup\$ 200Mbps means a max of around 100MHz. CMOS is not a differential standard. Do you have datasheets for the two things you are trying to connect? \$\endgroup\$ Jun 23 '16 at 3:47
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    \$\begingroup\$ I don't mean to sound condescending when I say this, but based how you are presenting the problem, I think you are in way over your head. 1GHz signals are tricky to work with, you need to first learn about impedance control, transmission line effects, and high-speed PCB design. \$\endgroup\$ Jun 23 '16 at 3:57
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I have a host of differential signals from a board thats 3.3V. Now, I need to interface it to a board that can accept 2.5V. Now, is it possible to use a standard level shifter like this ?

As comments point out, the part you found is only capable of level-shifting single-ended signals at up to 200 Mbps. You said your maximum rate is 1 GHz.

You can level shift a clock signal by simply ac-coupling and re-biasing:

schematic

simulate this circuit – Schematic created using CircuitLab

With the given resistor values, the bias at the Rx inputs is at Vcc/2. If you need a different common mode voltage, you need to find other resistor values that give that value as voltage divider, and also form a 50-ohm termination (assuming matching a 50-ohm transmission line)

For data signals, you can use the same scheme if the data is balanced (contains equal numbers of 0's and 1's over a span of a few dozen bits). If the data is not balanced, you may have to find an appropriate level shifter for your data rate and source/receiver voltage levels.

Now, my clock is going from one board to another board. And I foresee a degradation of the performance. How can I rectify that ?

Be sure to use impedance-matched transmission lines to connect between the boards. Be sure to use an appropriate technology for the distance you need to cover.

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  • \$\begingroup\$ Thank you so much. But the clock scheme you have shown is differential. My clock is single ended. Now, regarding the appropriate technology. What do you mean by that ? \$\endgroup\$
    – Board-Man
    Jun 23 '16 at 5:03
  • \$\begingroup\$ AC-coupling will also work on single-ended clocks. But why use single-ended clock with differential data? Your clock is likely your biggest EMI emitter. \$\endgroup\$
    – The Photon
    Jun 23 '16 at 5:06
  • \$\begingroup\$ "appropriate technology" means the right way to do it depends on a bunch of stuff you didn't reveal in the question. \$\endgroup\$
    – The Photon
    Jun 23 '16 at 5:06

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