First off no, you are not really doing anything to do with reliability. The best that these test can even come close to is "infant mortality" test in which you are winnowing out the device that might have failed early. Either because of marginal devices, damage during assembly and poor mechanical qualities of the soldering (from the thermal cycling).
You haven't given any details as to what the temperature ramp rates are, how many devices you are testing and other operational parameters.
You can't do reliability testing without some serious work a head of time, simply because of the expanse (in equipment, in time [ it may take months] and in plain old "figuring" it out).
You start with a FIT analysis (if you can get data even) this will apply to simple devices. Complex devices ... likely never.
You then have to study many devices to the point of failure at different temperatures. What is meant by failure? It very much depends upon what the device is, it could be a single hiccup in a pipeline load of a processor so occasionally it doesn't "compute right" to a leakage current measurement exceeding specification.
Once you've run the statistically significant number of devices at each temperature you run them until you get a statistically significant drop out rate. Then you turn to use that data to estimate the activation energy of that failure mode. But then if another failure mode comes along ...
Anyways, assume you have the activation energy. You then can use the Arrhenius equation to estimate the reliability of the device.
Here is a link to a FIT discussion here on EE.SE