- There is no need for such tagging. There is simply one buffer for each "channel", at predetermined locations (or dynamically allocated by the OS, but it doesn't matter). So we know where the data received by each channel is in RAM.
- The processor can indeed send and receive data simultaneously (if this was what you meant by "synchronicity").
- Throughput performances can be guaranteed.
The question is a bit confused, so I'm not sure I can identify the level of what you understand and the point where you start being lost. So I'll try to explain from the beginning.
So, first, what's in a microprocessor? There is a lot of sub-blocks in there, not just a CPU. Each UART is another block, for example. And each block can work independantly from the others. They can all work in parallel.
Now, what happens when a byte arrives to an UART? The UART reads the byte, bit per bit, and when the complete byte has been read, places it in a hardware register. It also notifies the CPU (through an interrupt) to tell it that there is a byte available. From there, the UART doesn't care what happens to this byte anymore. The next UART job is to be ready for the following byte that is coming.
The CPU, however, has been notified, so, hopefully, the firmware has been made in order to trigger an appropriate routine when the UART interrupt is triggered. This routine will get the byte from the register (located at a specific address, decided by the chip manufacturer) and copy it in a buffer somewhere in RAM (located at an address, within the RAM space, decided by the firmware developer: you). The CPU will then, maybe, update some variables in the program to know how many bytes have been read, eventually switch to a new buffer if it's full, etc, ... and go on with the other tasks he has to do.
What happens when multiple UART are working in parallel? First, bytes don't have to be synchronized between all UARTs, because each UART is independant. So the bytes can arrive when they want. When a byte arrives, the UART will trigger its own interrupt, so the CPU will know which UART has received a byte (on some MCUs, multiple UART can share the same interrupt, but there is always a way to check which UART has actually received the byte, through some control registers). Then, the interrupt routine, once the UART has been determined, will read the appropriate register, because each UART has its own receive register. So the CPU will get the byte, knowing from which UART it comes. Then it will copy the byte in the appropriate buffer, because each "channel" should have its own buffer. So you see that there is at no point a need for "tagging". It's just that the bytes from each channel end up in different predetermined locations in memory.
Then, maybe, once enough bytes have been grabbed, you need to output it to some other UART. It works the same. The CPU will tell the output UART to send a byte by placing the byte value in a specific hardware register. And the UART will warn the CPU through an interrupt when the transmit has completed, so the CPU can ask the UART to send the next byte.
All in all, the CPU doesn't have many things to do here. Just getting the bytes as soon as the input UARTs receive them, and give them back to the appropriate output UART. This is all done through read/writes of specific hardware registers at the right time. The CPU doesn't actually do the transmit/receive operations. And all UARTs and the CPU work concurrently. So, with CPUs with reasonable performance, you can guarantee maximum throughput. Moreover, using DMA, the load of the CPU can decrease even more... But DMA will be for the next chapter.