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I am looking at the recommended circuit for the ADV7180 by Analog Devices and trying to understand some of the reasoning behind the design choices. I realize some of these questions may be a lack of understanding of some fundamental concepts and would really appreciate if someone could explain them to me.

I know that the XTAL inputs are used for the 28.63636Mhz crystal but I don't understand how they came up with the circuit shown. What is the purpose of the additional resistors and the capacitors in this case?

For the ELPF input, from reading the datasheet all I could get was that it is the "External Loop Filter" pin and must be placed as close as possible to the IC. What is the purpose of this pin and again, how does the recommended design work?

The data sheet can be found here: http://www.analog.com/media/en/technical-documentation/data-sheets/ADV7180.pdf

Datasheet

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The capacitors for the crystal are crystal load capacitors. The actual value will vary across crystal manufacturers, but the suggested values are a good start. The datasheet is light on details of the required load capacitance for the internal oscillator.

The ELPF components are part of the loop filter for the internal phase locked loop.

I have extensive experience with this specific range of decoders, and if your application has any real temperature variation, the use of C0G / NPO capacitors in the ELPF is not merely recommended, but just about mandatory for stable circuit performance.

Note that ADI does not mention this; I found it out the hard way.

The component values in the ELPF are set by Analog Devices, and I was never told just why those specific values were used despite my best efforts to find out (my application was a bit unusual, so understanding all these things was rather necessary).

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The components on the ELPF pin is the Loop filter for the chip's PLL, read this to learn about PLLs.

The ELPF pin is the output of the chargepump and at the same time the input of the VCO which are both on-chip. the components have to be close to the pin as not to introduce extra inductance. This is needed so that the filter suppresses the pulses coming out of the charge pump properly.

If Analog Devices could have integrated the loop filter on chip they would have but some components, in this case the 10 and 82 nF capacitors, are far too large to implement on-chip so they have to be external.

The PLL locks the VCO frequency to the accurate frequency from the crystal so that the VCO can also be at an accurate frequency. Without the PLL the VCO's frequency would be inaccurate and varying with temperature, supply voltage and aging. A PLL eliminates all this.

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  • \$\begingroup\$ Thank you for your response! How are the values for the loop filter selected? \$\endgroup\$ – athedcha Jun 26 '16 at 17:46
  • \$\begingroup\$ There is quite some theory behind the selection of the PLL's loop filter components. It all depends on the required speed of the loop, how much spurious supression and VCO gain for example. You really have to dive into PLLs if you want to understand it all. There are some online calculators which you could use in case you ever need to design a PLL. \$\endgroup\$ – Bimpelrekkie Jun 26 '16 at 19:58
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This design choice is not ADV7180 exclusive.

It's how a quartz crystal oscillator works. The circuit is called a Pierce Oscillator. A quit good explanation can be found in this MX COM application note.

enter image description here

The capacitors C1 and C2 form the load capacitance for the crystal. The optimum load capacitance (CL) for a given crystal is specified by the crystal manufacturer. The equation to calculate the values of C1 and C2 is

enter image description here

Where CS is the stray capacitance on the printed circuit board, typically a value of 5pf can be used for calculation purposes. Now C1 and C2 can be selected to satisfy the above equation. Usually C1 and C2 are selected such that they are approximately equal. Large values of C1 and/or C2 increases frequency stability but decreases loop gain and may cause start-up problems.

The resistor Rf around the inverter provides negative feedback and sets the bias point of the inverter near mid-supply operating the inverter in the high gain linear region. The value of this resistor is high, usually in the range of a 500KΩ ~ 2MΩ. Some of MXCOM’s ICs have this resistor internal, refer to the external component specifications in the data sheet of a particular chip.

R1 is the drive limiting resistor, the primary function of this resistor is to limit the output of the inverter so that the crystal is not over driven.

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