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I'm looking for some help/insight into a decision I am making about whether to change a circuit I have built.

My slave device requires a pull-up on its SDO (MISO) pin which is open collector. When originally drawn, this pull-up was placed close to the slave device, before the signal passed through an isolation device and was then sent over a link harness to the board containing the master device.

Later we moved the isolation barrier to the control board side, and the pull-up got dragged across too, for whatever reason.

So the sequence now goes

SDO pin -> Link harness -> master board with pull-up and isolation device -> gate array MISO pin

and the two boards work together OK.

Given the opportunity now to respin the slave board, what are the arguments for bringing the pull-up back across to live with the slave device, if any?

Apologies for lack of diagram - written on my mobile device. Hope the question is clear, thanks for any input.

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  • \$\begingroup\$ What does the device data sheet say about this? \$\endgroup\$ – Andy aka Jun 26 '16 at 16:39
  • \$\begingroup\$ LTC6804 data sheet says that the SDO pin needs a pull-up, but doesn't specify where. I'm looking for a 'best practice' answer, whether it matters if the pull-up lives next to the open collector, or if it makes no difference if it is at the end of e.g. a 10ft wire. \$\endgroup\$ – ZetaSeeker Jun 26 '16 at 16:55
  • \$\begingroup\$ I mean, I was hoping to keep it as a generic SPI question for wherever an open-collector is concerned \$\endgroup\$ – ZetaSeeker Jun 26 '16 at 16:57
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My personal preference is to always include a pullup on the input side of a connector. It's not strictly necessary, but its safer.

A floating input may or may not hover near a logic threshold, depending on the logic family, whether the input has an internal pullup. Leaving an input unterminated may result in circuit noise causing voltage excursion around the logic threshold, resulting in erroneous clocking signals (if the input is a clock), or increased noise susceptibility in the attached system, (because internal logic nodes may now toggle rapidly, creating current spikes). Inclusion of a relatively high resistance pullup on otherwise floating inputs eliminates these potential problems.

Also, pay attention to power sequencing in systems with more than one supply, or a system with various components that need to turn on in a prescribed sequence for proper operation. Sometimes the inputs of a device only reach a high logic state slowly if left unconnected, causing circuit turn on delays or other problems, and properly chosen pullups can solve these problems.

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  • \$\begingroup\$ Thanks for the input - pun intended! I do consider floating inputs when it comes to e.g. partially used op-amps, but I had got fixated on the slave here. By this reasoning, I'd be best leaving the pull-up where it is on the board holding the master device, and the slave input pin (MISO). Having the open-collector pin left 'open' on the slave side won't cause problems, but leaving the isolated gate input pin open on the master side might. \$\endgroup\$ – ZetaSeeker Jun 27 '16 at 5:07
  • \$\begingroup\$ Just if anyone grabs the slave board and uses it in a new application, they'll need to know to use a pull-up on MISO. This is still reasonable. Thanks again for sharing your view. \$\endgroup\$ – ZetaSeeker Jun 27 '16 at 5:09
  • \$\begingroup\$ You can also consider a "split pullup", whereby if you want a total resistance of R in the pullup you put 2R pullup on the logic input side of the connector, and a 2R pullup on the output side. when the connection is made you have an effective pullup of R, but if there's no connection you are still pulling up on the logic input to prevent issues with floating inputs. It generally doesn't require much pulling up on the input, because you don't need to source much current pulling up inputs (pulling down TTL inputs is a different story), especially if there are no switching time considerations. \$\endgroup\$ – AndyW Jun 27 '16 at 21:07

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