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I want to find out if my purchased 8085 works. I'm thinking of:

  • pulling down the data bus and interrupt lines (equivalent to NOPs)
  • using a slow RC clock (1 Hz or so)
  • drive LEDs through BJTs with the IO/~M and status pins (and the address pins maybe) so I can monitor each T-state and see if everything's fine.

The problem is I don't know if 1 Hz is too low, that it will hinder the 8085 operation. There's also this, from the datasheet:

RC clock

There was no mention of this low frequency limit when they talked about using an LC clock.

  • So is this limit RC-related and why?
  • Is this a hard limit? What would happen (if anything) if I went ahead and ignored it?
  • If I can't use this option, I'd appreciate any alternatives that can yield the same or close to 1 Hz so I can track the states of each instruction cycle.
  • Can a basic "button and pull-up resistor" combo be used to generate the clock pulses safely, even if its aperiodic?
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  • \$\begingroup\$ A datasheet I found says the minimum clock frequency is 500 KHz, so manual clocking will not work. \$\endgroup\$ – Peter Bennett Jun 27 '16 at 23:22
  • \$\begingroup\$ saundby.com/electronics/8085/freerun.shtml \$\endgroup\$ – Bruce Abbott Jun 28 '16 at 0:13
  • \$\begingroup\$ The only microprocessor from that era that I know could be run at a very low clock frequency (e.g. 1 Hz) or even single stepped was the RCA 1802. \$\endgroup\$ – tcrosley Jun 28 '16 at 0:36
  • \$\begingroup\$ @BruceAbbott I've come across that page before; the frequency used is still too high for me to reliably monitor the LEDs and status signals. Even if I used a 1 MHz crystal, I'd only be able to observe the highest 2 bits of the address. \$\endgroup\$ – TisteAndii Jun 28 '16 at 0:39
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    \$\begingroup\$ @TisteAndii Static vs Dynamic logic implementations. Dynamic logic can operate more quickly, but relies on charge storage between stages of logic, thus requiring the logic be clocked fast enough that the leakage RC-decay will not change the stored voltages more than the internal logic thresholds. \$\endgroup\$ – user2943160 Jun 28 '16 at 0:52
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Minimum clock frequencies on parts of this vintage are typically an indicator that the CPU contains dynamic NMOS logic. Dynamic NMOS logic uses the gate capacitance of NMOS transistors to temporarily store data during an operation. Junction leakage in these transistors limits the lifetime of this temporarily stored data; as a result, this data may leak away entirely if the clock frequency is too low, leading to incorrect results.

While an inappropriately low clock frequency won't destroy your 8085, it may make it behave incorrectly during your testing. I wouldn't recommend it. Get an oscilloscope or logic analyzer to observe the behavior of your CPU during free-run.

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  • \$\begingroup\$ Thanks. I guess I have my answer. I'll be buying a logic analyzer soon anyways. But just out of curiosity, if the MPU did support very low frequecies, would a button and pullup combo suffice as a clock? Even if it most likely isnt periodic? \$\endgroup\$ – TisteAndii Jun 28 '16 at 1:00
  • \$\begingroup\$ You'd have to be very careful about debouncing it, but, in principle, yes. \$\endgroup\$ – duskwuff Jun 28 '16 at 1:01

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