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I have an input signal sine wave like but comes with a little distortion. I need to give an interrupt when it reaches to minimum or maximum value with an acceptable tolerance.

res1

this graph is from a fading sine wave, what I want to do here is to detect the first minimum right before or right after rising again. So I can discharge or recharge it when it reaches its peak. But, as I told before there is a little distortion on the signal that may lead to false detection.

res2

I can tolerate a little timing here, interrupt may give signal a little time after peak point.

So, how can I do this in transistor level? I know I can use an ADC but I need this to be a transistor level solution.

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  • \$\begingroup\$ Not really. The system is not stable, it's peak values may change. Using a comparator requires the acknowledge of the peak value which I want to detect so I can give an interrupt. \$\endgroup\$
    – Alper91
    Jul 3, 2016 at 9:08
  • \$\begingroup\$ Yes, it would solve distortion problem. But peak detection still on the table. \$\endgroup\$
    – Alper91
    Jul 3, 2016 at 9:11
  • \$\begingroup\$ I am currently using that you suggest. Using a schmitt trigger but I need more than that. Also, your other suggestion requires the knowledge of the frequency and also capability to arrange the timing. I need fully analog solution, I don't want to use counters etc. The system is already pretty complex. \$\endgroup\$
    – Alper91
    Jul 3, 2016 at 9:20

2 Answers 2

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Use some filtering to get rid of the majority of false flats and then use an analogue differentiator (CR high pass filter circuit) to produce zero crosses on the remaining flats.

This can feed a comparator that rises or falls depending on the signal direction change. Then, use an exclusive OR gate and a small RC time constant to convert the comparator output to pulses each time it changes polarity and these feeds the interrupt: -

enter image description here

Then exit that interrupt early when you see that the waveform is still heading south or north i.e. it hasn't reached max or min flat.

Because this problem is under-constrained and only the OP can really identify situations that this might not work I'm not going to get into lengthy discussions about this scenario or that (as yet unspecified) scenario.

If it is still seen as bad to generate an interrupt and leave it early on a false peak detection then use another little micro to do this bit of the analysis.

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  • \$\begingroup\$ Thanks. I think this is the answer. Only downside I see in this configuration is that the signal frequency may change between 1 KHz and 33 KHz so for a fixed res and cap value, interrupt delays will change also. So I have to switch between various res and cap values for each configuration. \$\endgroup\$
    – Alper91
    Jul 3, 2016 at 9:47
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    \$\begingroup\$ @Alper91 If you pull some papers on automatic gain adjustment for hearing aids, etc, you'll find similar circuits that change R based on a digital counter. It helps you figure out your FFT window. It's just like Andy's circuit with a the R being set by the frequency dynamically. \$\endgroup\$
    – b degnan
    Jul 3, 2016 at 13:26
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"I want this!"

You're not the only one. Such a circuit would be very useful to tell when share prices had bottomed out and I'd use the interrupt to tell me when to buy. As drawn in your second diagram you are looking for a circuit that will predict that this is the lowest value that's coming. We don't have electronics to predict the future.

What you can do is check if the voltage stops decreasing for some time (that you specify) and trigger on that. The interrupt will be delayed by that time value.

schematic

simulate this circuit – Schematic created using CircuitLab

Figure 1. Simplified interrupt circuit.

  • Comparitor output will go high on rising input.
  • R1-C1 determine the lag of the non-inverting input.
  • DELAY will determine how long the signal is high for before triggering. This will have to be longer than your longest "Not This!" period.
  • R2 is included as a reminder that many comparitors have open-collector outputs.

enter image description here

Figure 2. What you can have - if you behave.

You might be able to do the delay in software by feeding the comparitor directly into the interrupt and setting a timer interrupt to check if the comparitor is still high after the required delay.

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