Everyone knows that a CMOS inverter is simply a PMOS connected to an NMOS. There are situations in asynchronous design that we need to compensate for the inverter propagation delay in a parallel signal running along side of the other signal. In that case I can see that designers add a buffer in gate level schematics.
But I need to implement that buffer by myself using CMOS cell libraries and it seems to me the most rational approach is just to put two inverters in series which inverts the signal twice hence acts like a buffer. But it seems to me that the propagation delay also will be doubled.
How one can have a buffer with EXACT same propagation delay of an inverter?