You are making this way too complicated. For reference, here is your circuit:
There are a number of ways to simplify this. The two back to back inverting buffers are just silly. Why not the obvious single non-inverting buffer? Also, the first inverting buffer isn't actually unity gain. Note that the signal coming in has the impedance of R4//R6, which is 5 kΩ. With the feedback resistor being 10 kΩ, the U2 stage will have a gain of -2.
All you really need is this:
R1 and R2 form a voltage divider that reduces the gain of the input signal. Without V1, that would be just scaled about ground. V1 adds a offset. By separating the desired gain and desired offset, we can compute the values easily.
We actually have three degrees of freedom and so far only stated two constraints. The remaining constraint can be expressed as the input or output impedance of the divider. For now, we'll just arbitrarily pick 10 kΩ for R1 to nail down the third degree of freedom. Later you can scale all resistors by the same amount to adjust the impedances.
The input signal has a range of 24 V and the output has a range of 3.3 V. Therefore from the gain alone we know that the R1,R2 voltage divider must have a gain of (3.3 V)/(24 V) = 0.138. With R1 = 10 kΩ, R2 must be 1.59 kΩ.
Now we only have a single constraint left and a single value to find, which is the voltage of V1. One way to solve this is to pick any one operating point and find what V1 must be. I'll pick 0 V in, which we know must result in (3.3 V)/2 = 1.65 V. So now we have a voltage divider with the top being at 0 V, the resistors being 10 kΩ and 1.59 kΩ, the output being 1.65 V, and we need to find the bottom voltage. From basic voltage divider math, V1 is 1.91 V.
So we now have:
At this point it is a good idea to do a check to make sure we didn't mess up anything. You could, for example, put 12 V in and verify that you get 3.3 V out. I've done that and it checks, but I'll leave this is a exercise for you to do on your own.
This circuit will work nicely, but requiring a 1.91 V source is a bit inconvenient. Note that from the rest of the circuit's point of view V1 and R2 form a Thevenin source with a voltage of 1.91 V and a impedance of 1.59 kΩ. We can create exactly the same Thevenin source from your existing 12 V supply:
We have two constraints. The R3,R4 voltage divider by itself must produce 1.91 V:
(12 V) R4 / (R3 + R4) = 1.91 V
And the parallel combination of R3 and R4 must be 1.59 kΩ:
(R3 * R4)/(R3 + R4) = 1.59 kΩ
I'll skip the 8th grade arithmetic, but that comes out to R3 = 10.0 kΩ and R4 = 1.90 kΩ. So here is the final circuit:
Yes, it really is that easy.
Note that the input impedance is R1 + R3//R4 = 11.6 kΩ, and the output impedance is R1//R3//R4 = 1.38 kΩ. If those are acceptable, then you need to do nothing more. All the resistors can be scaled by the same amount to change these impedances.
If the input impedance is still too low at the maximum signal impedance your A/D needs, then you can use a single unity gain buffer following this resistor network. In that case, scale the resistors to get the desired input impedance. The output impedance will be that of the unity gain buffer, and independent of the resistors.
So at most, your circuit looks like the three resistors above followed by a unity gain buffer.
Again, yes it really is this simple.