What is the function of demultiplexers (DMX) in this Logisim diagram of a Register File design:

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Also could you explain the meaning of:




  • \$\begingroup\$ DMUX is an "Enhanced decoder" such that given the selected line, the output of this line is the DMUX input(0 or 1) unlike the decoder which assures that its always 1 Why DMUX? 1-to select one of the registers 2-to be able to write data into this register by setting the DMUX input to a 0 or 1 [Enable] \$\endgroup\$ – Elbehery Jul 20 '16 at 22:45
  • \$\begingroup\$ @AbdoMohamed So can we say that the right half of diagram related with storing and left side related with loading? \$\endgroup\$ – mertyildiran Jul 20 '16 at 22:48
  • \$\begingroup\$ @AbdoMohamed or the exact opposite? \$\endgroup\$ – mertyildiran Jul 20 '16 at 22:50
  • \$\begingroup\$ @AbdoMohamed regval and DMXs are input right? \$\endgroup\$ – mertyildiran Jul 20 '16 at 22:51
  • \$\begingroup\$ Exactly, i`m posting an answer if this is not clear enough \$\endgroup\$ – Elbehery Jul 20 '16 at 23:12

First let me define a simple Register

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INPUTS: Write,Data_in[16],CLK

OUTPUTS: Data_out[16]

IF the Write pin is HIGH, the data in the Data_in[16] will be stored in this register the next clock cycle (Rising or falling edge)

The Write pin is connected to the DMUX outputs so you can choose one of the 8 registers to write by providing the proper select value[SEL pin] and a '1' on the Dmux input

So for example if i want to write data in R5

1- Put the data in regval[16]

Since regval[16] is connected to all the 8 registers, we need to select only one of the 8 registers to store this value

How can we make this !

By using a DMUX

enter image description here

2- I`ll set dsel[ 3] to '101' to make sure that the DMUX is selecting the 5th register

3- Then i`ll set dwrite to '1' to make sure that the 5th register 'Write' pin is triggered HIGH and the data in regval will be stored only in this register the next clock cycle edge

Now we are able to Select one of the 8 registers and write the data only to it even though all the registers Data_in[16] pin are connected to the same bus (regval)

Same idea when reading

Connect all the registers Data_out[16] pin to the Mux inputs, then output only one of them by providing the proper value on the select (sel) pin

For example if i want to read the value of R5

enter image description here

1-I`ll put '101' on dsel[ 3]

2- read the register stored value from the Mux output

Why dsel,ssel,tsel

when making an ALU operation for example adding two numbers and storing them in a register

R[d] = R[s] + R[t]

D is the destination register where the result is stored

S and T are the two operands


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