The problem is to design an address decoding circuit for two 4Kx8 RAM chips at the 2050H . We have 16 address lines. So, for 4Kx8 RAM we need 12 address lines to address the memory. Remaining can be used for deriving CS' (chip select) signal.
Here, For RAM 1 we have
Starting address 2050H : 0010000001010000
Ending address 304FH : 0011000001001111
For RAM 2 we have
Starting Address 3050H: 0011000001010000
Ending Address 404FH: 0100000001001111
Bold = A12
So, if we use a 1x2 decoder as in the picture, and A12 is the input. The chips will be selected depending on the state of A12. It will work fine until ending address is used. What happens when someone tries to access the ending address?