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I am using an FTDI chip for USB-UART conversion. The UART i/f on the MCU operates on 2.4V. Typically the VCCIO pin that powers the UART i/f on the FTDI IC is driven by the 3V3OUT pin [3.3V]. While the VCCIO pin description allows for a voltage other than 3.3V to be applied, I haven't seen any reference design that doesn't use the 3V3OUT connected back to VCCIO.

For people who have worked with the FTDI IC before, are there any gotchas? or is it OK to connect the VCCIO pin to 2.4V that is generated from the VCC (+5V) supply to the IC.

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  • \$\begingroup\$ Did you connect the grounds together? \$\endgroup\$
    – Ignacio Vazquez-Abrams
    Jul 25, 2016 at 15:09
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    \$\begingroup\$ No gotchas as long as you have your interface on the other side accepting this voltage. \$\endgroup\$
    – Eugene Sh.
    Jul 25, 2016 at 15:11
  • \$\begingroup\$ @IgnacioVazquez-Abrams: grounds together as MCU and FTDI on the same board. \$\endgroup\$
    – NK2020
    Jul 25, 2016 at 15:13
  • \$\begingroup\$ @EugeneSh.Thanks- yes the MCU would operate at 2.4V. \$\endgroup\$
    – NK2020
    Jul 25, 2016 at 15:14
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    \$\begingroup\$ "This pin can also be supplied with an external +1.8V to +2.8V supply in order to drive the outputs at lower levels"...Seems pretty clear to me. \$\endgroup\$
    – The Photon
    Jul 25, 2016 at 15:43

1 Answer 1

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From personal experience with FTDI, note that the FTDI transmit lines remain at logic "high" when idle, so if you leave the FTDI connection in place and power the processor down, the voltage remains on the FTDI Tx pin. The FTDI will provide enough power to power the processor through its Rx pin. I have often communicated to a processor without having it Vlogic powered except in this manner, although it may behave unpredictably because the power is not always present and peripheral devices may be unpowered. If you are depending on a power down reset for operation, make sure to buffer the FTDI input through an isolator or disconnect it when you power down.

Having 2.8 volts on the processor designed to run at 2.4 is not ideal but probably will be OK. The simple test is to monitor Vlogic on the processor and see if it gets pulled up when you apply the FTDI to the input. A buffer or an isolator is still the best bet.

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  • \$\begingroup\$ See edits - I hit enter too soon. \$\endgroup\$
    – John Birckhead
    Jul 25, 2016 at 15:23
  • \$\begingroup\$ Powering the CPU off the logic lines from the FTDI is not an issue as long as you follow the requirement in the FTDI datasheet that the power rails are all generated from the same source. \$\endgroup\$
    – Andrew
    Jul 25, 2016 at 15:55
  • \$\begingroup\$ Sorry if unclear - I am speaking of the processor vLogic being pulled up from the Rx input being powered at a higher voltage. \$\endgroup\$
    – John Birckhead
    Jul 25, 2016 at 16:20

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