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While we have dual cores and quad cores (and now octo cores). I often wonder if they sit side by side or are they completely stacked on top of eachother. If either or, what kind of benefits or draw backs will this bring to the motherboard, other hardware and performance overall?

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  • \$\begingroup\$ You can stack them, but that's effectively like stacking multiple computers on each other. It's not multi-core. That's making clusters. \$\endgroup\$ – Mast Sep 20 '16 at 13:16
  • \$\begingroup\$ Mind if i be intrigued to learn more? :D so how the performance will go for said "cluster" \$\endgroup\$ – Gareth Compton Sep 20 '16 at 13:34
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They are side by side on chip, and tightly integrated with the memory and control interface/datapaths.

You certainly cannot stack them on top of one another (unless they are specially built for this).

The benefits of multicore are that the individual are so close together (on the same silicon die) and do not have the huge cap of normal input/output pads for internal signals. This lets the cores communicate very quickly with one another.

cpu floorplan

Notice how the memory controller has access to each core. And the cache (high speed memory, much faster than RAM) is shared among two sets of 3-cores.

Once the cores are physically separated per chip, all of those very close connections get incredibly long. That requires a lot more drive power. This in turn slows everything down.

On top of that they are not built for this. You might be able to run two cores in parallel (with special MOBOs) but it would not be the same as 'dualcore' vs 'quadcore'. (and not as good as if they were integrated on a single chip). It could handle independent threads well, but if they depended on each other the communication between the cores off-chip would be very slow. And a lot of internal nodes / caches are not exposed to the CPU's I/O.

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    \$\begingroup\$ Great answer, but just to add. There are also ICs that are physically "stacked" vertically using through die vias. It's worth noting that due to heat constraints, you generally run one at a time, so you use these where there is a physical density constraint. \$\endgroup\$ – b degnan Jul 29 '16 at 16:24
  • \$\begingroup\$ I haven't heard of that. are these IC's processors though? They would need special settings so that all the pins didn't just short together. I know they have 3d silicon but it's mostly experimental and afaik no commercial processors have been fabricated using it. \$\endgroup\$ – jbord39 Jul 29 '16 at 17:21
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    \$\begingroup\$ These are not commercial processors per se, but they are still produced. As an example, there were 5 MONARCH processors stacked for a small footprint in a dataflow application (ie: radar) and 4 of them were just idle unless there was some processing backup, and then they took turns taking data off the bus as the primary bogged down. The issues are cooling the stack, but apparently the bogging didn't happen enough to warrant dedicated units, but enough that when it did, you needed a lot of units. I couldn't find a reference, but I saw it at a conference a few years ago <shrug> \$\endgroup\$ – b degnan Jul 29 '16 at 20:10
  • \$\begingroup\$ Really juicy info, but whats to say that they may insert a metal sliver per chip to run aircool? (Or they may have and that can be the reason) \$\endgroup\$ – Gareth Compton Jul 30 '16 at 15:17
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    \$\begingroup\$ The stacking you will see in actual products at present is RAM on top of SoC processors - this is found in many of the raspberry pi boards, and likely some tablets too. Since the memory signals are some of the few truly high speed external interfaces typically used, keeping them off the PCB entirely simplifies things quite a bit. \$\endgroup\$ – Chris Stratton Jul 30 '16 at 15:50

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