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Could anyone tell what is the advantages/disadavantages of using half duplex SPI over full duplex SPI communication. I know using half duplex, we can save one pin. But is this the only advantage of using half duplex? Is the rate at which master reads the data from the slave same for both mode of communication? Please reply

Regards

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  • \$\begingroup\$ Can you give an example of half-duplex SPI? \$\endgroup\$
    – Andy aka
    Jul 29, 2016 at 17:10
  • \$\begingroup\$ @Andyaka - this would occur when a device has a bi-directional data pin rather than a distinct MISO and MOSI. To name an example that comes to mind, the A7105 2.4 GHz transceiver IC. If I recall, many STM32F MCUs have a degree of support for this mode in their SPI engines, but most MCUs can handle it with some slight software intervention to configure pins between words. In terms of speed, while exceptions exist most SPI interfaces don't communicate that much useful data in both directions at the same time, though many peripherals do clock out their status word during your request. \$\endgroup\$ Jul 30, 2016 at 4:41
  • \$\begingroup\$ One example of half-duplex SPI are NOR Flash chips. MX25L256 uses SIO0 in half-duplex mode for dual and quad IO. \$\endgroup\$
    – Sergey
    Feb 18 at 14:28

2 Answers 2

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Half duplex unidirectional or write only mode could be used when master don't need data from slave. For example when working with most LCD it is usually OK to do writes only (although by reading status, framebuffer etc master can detect misbehavior and reset the slave, but LCD is usually not critical component and scheduled blind resets might be enough). The advantage is, as you mentioned, saving 1 pin.

Read/write clock rates are always same, since it is done simultaneously. MCUs SPI read and write buffers are shift registers with same clock, so when master is writing it is also reading (even if slave is not sending, in that case HIGH bits are received).

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    \$\begingroup\$ That would not really be half duplex, but unidirectional. Half duplex is when read and write use the same wire. \$\endgroup\$ Jul 30, 2016 at 4:38
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Mostly its a method for allowing a simpler design that has fewer pins on the CPU and allows for lower signal count on cables. Effectively you're trading speed and complexity for cost and simplicity.

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