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I built a true RMS-to-DC converter circuit using AD736 chip on breadboard. The schematic is shown below. I'm a little confused with the output that I'm getting though. When I applied a sine wave of 100 mVpeak, the DC level equivalent output that I'm getting is 142 mV instead of 70.7 mV. Is this due to the crest factor of this AD736. The crest factor is 2 (Vpeak/V rms). Hence, I assume that it is giving me the output of 142 mVpeak which is equivalent to 70.7 Vrms. Did I get this correct?

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  • \$\begingroup\$ \$ 100~mV_{P-P} = 50~mV_{PEAK} = \frac {50}{\sqrt {2}} = 35.4~mV RMS \$ if it's a sinewave. I presume you meant 70.7 mV rms not volts. \$\endgroup\$ – Transistor Jul 29 '16 at 17:46
  • \$\begingroup\$ He said 100 mV peak @transistor \$\endgroup\$ – Andy aka Jul 29 '16 at 17:49
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You have possibly made an error reading the data sheet - it needs proper + and - supplies with a much "harder" 0V feeding the common pin. You are using 100 k resistors and these are unacceptably large without decouplers across each: -

enter image description here

Also note what the DS says about minimum supply voltage: -

while operating from the minimum power supply voltage of +2.8 V, –3.2 V

That's a total of 6V minimum (when I went to school) so, your 5V supply is too low. For a symmetrical supply I'd be looking at +/- 3.3V to be on the safe side.

You also have Cav connected to a node with an earth symbol - it's unclear where this fits in with the rest of the circuit.

I'm not ruling out other errors but these seem the obvious.

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  • \$\begingroup\$ +1 for finding a multitude of errors. I worked with the AD736 and used +/- 5 volt supplies. Cav determines settling time vs. ripple that can be tolerated. \$\endgroup\$ – Sparky256 Jul 29 '16 at 18:04
  • \$\begingroup\$ thanks for the suggestion. For the Cav, @sparky is right about it, it fixes the settling time for RMS calculation. I used 6V supply voltage and TLE2426 instead of the 100K resistor to generate the Vs/2 voltage connected to pin 8(COM). it still gives me the same output, double the Vrms that i suppose to get. \$\endgroup\$ – rajk Jul 29 '16 at 21:03

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