I've just begun the MOS-level study of a MOSFET. So, pardon the naivety.
A very brief backstory: The Strong Inversion occurs in a MOSFET, particularly NMOS, when the silicon surface reaches a voltage value which is twice the Fermi Potential(ϕ). For p-type silicon, ϕ= -0.3V. Hence, for the inversion to occur the silicon surface voltage should reach -0.6V, given that voltage between source and body (Vsb) = 0V. The Value of Vgs (gate-to-source voltage) where strong inversion occurs is called threshold voltage (Vt).
My question: Please refer to the figure, which is mentioned in the same context as above. It says at Vbs = 0V, the value of Vt = 0.45V. So, at a gate voltage of 0.45V, inversion occured, which essentially means that the silicon surface potential has reached -0.6V.
With just an external gate voltage of 0.45V, and all other potentials (Vsb) at 0v, how did the silicon surface manage to attain a voltage of -0.6V. Where did the extra voltage come from? My question might be wrong as well, owing to the feeble intimacy to the topic; I tried others books but couldn't find a clean answer. Please enlighten.