I have a question regarding how to tackle an issue i am facing regarding DC offset at the input of unity gain difference amplifier difference.
Following are the details of my circuit :
I use a LT6375 IC for a howland current pump circuit.
The -ve input of the difference amplifier is at ground and the positive input is the output of a sallen-key filter (IC AD8028),which is Vout = Vdc + Vac (Vdc = Vdd/2 in this case.
To get rid of the DC offset from the filter stage i use a DC-blocking cap (see below). However there still seems to be an offset present after the cap.
Transient simulation result :
As you can see above, the voltage at node "Vin" which is after the DC blocking cap is around 1.2 V. I am unable to understand how to analyze where the DC offset is coming from. My simulation results match what i have measured on the PCB.
Also if i set the negative input to the DC offset seen at the positive terminal (of the IC)i get the desired results.
- Could the offset arise because of some ESD ciircuit at the input pad of the op-amp?
- The output current of this circuit depends on the difference of voltages seen at the differential terminals and that explains probably why i get the desired output once the -ve terminal was connected to the same DC level.
Can somebody help me analyze this? Any help will be appreciated.