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I have a CS4344 DAC connected to my STM32F407 outputting sound at a 44.1kHz rate with DMA and I2S and I would like to output and envelope signal through the internal DAC of the STM32F4, in sync with the I2S.

I could use a timer at a frequency of 44.1kHz but the 2 outputs wouldn't be in sync.

Is it possible to use the I2S WS clock to trigger the DAC conversion? So that everytime a sample is sent through I2S, a sample is converted through the internal DAC?

Thanks in advance!

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  • \$\begingroup\$ Does the answer below answer your question? \$\endgroup\$ – pgvoorhees Aug 3 '16 at 11:20
  • \$\begingroup\$ Sorry if I haven't answered earlier. Unfortunately, the project development is at a too late stage to consider changing the microcontroller... But thank you for your answer! \$\endgroup\$ – Florent Aug 3 '16 at 13:33
  • \$\begingroup\$ I'm sorry to hear that. It's kind of a tough nut to crack. When working on mine, I ended up spending a lot of time looking at micro-controllers to try to get it to work. The other thing you can try is using Dual-port ram to help with the rate-mismatch. It allows your DMA to work at one speed, and the converters to work at another. IDT.com makes them. \$\endgroup\$ – pgvoorhees Aug 3 '16 at 14:05
  • \$\begingroup\$ Cool! I'll check it out! I was thinking feeding back the WS clock into an EXTI pin and converting in the interrupt routine but I don't think it would work. I'll let you know \$\endgroup\$ – Florent Aug 3 '16 at 14:57
  • \$\begingroup\$ Anytime. Good luck. If you could use some more pointers, I came up with another (yet uglier) way to do this. I also developed the dual-port memory idea and can give a few more hints if that would be useful. \$\endgroup\$ – pgvoorhees Aug 3 '16 at 15:15
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I was not able to figure that out in the STM chips.

I had to solve a very similar problem to yours (phase-locked DMA transfers). I had to move to the NXP Kinetis chip to do it. The Kinetis has a few

 - DMA channels where requests can be gated by the
     -> Programmable Interrupt timer, 
         ->which can also trigger the programmable delay block, 
             ->which can trigger the flexible timer module, 
                 ->which can be configured to start the DAC conversion. 

It was a "clever" (brittle, hardware-dependent) solution. But I needed it, and it worked.

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  • \$\begingroup\$ It's not clear why you need a delay. The output from an audio DAC will not be instantaneous anyway, what really matters is that the frequency is locked to a common source, and pretty much any part of this type including the ST one has timer and a DMA engine that can do that. The delay is probably possible too - for example, setup a timer compare as for PWM, but does not seem necessary. \$\endgroup\$ – Chris Stratton Oct 1 '16 at 17:12
  • \$\begingroup\$ The reason for the delay block is to know for certain that the Flex Timer Module has a deterministic phase relationship to the PIT. The PIT and the FTM do run from the same clock source, but when one starts with respect to the other is harder. The PDB glues these two modules together in time. I should note though, that the PDB only fires once to set the phase between the two, then it retires. This prevents things like the DAC collecting data when the ADC is in the middle of converting. \$\endgroup\$ – pgvoorhees Oct 1 '16 at 18:10
  • \$\begingroup\$ These concerns come from misunderstanding. You do not need the delay block to achieve consistent synchronization. Your answer amounts to " I made this work" but is given in the context of a false implication that it is necessary. \$\endgroup\$ – Chris Stratton Oct 1 '16 at 18:46
  • \$\begingroup\$ I think they do not come from misunderstanding. But if you have a good strategy, I am all ears. Please keep in mind though, I did not explain the entirety of the project and I think you are making some assumptions about what peripherals are being used. \$\endgroup\$ – pgvoorhees Oct 1 '16 at 18:57

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