1
\$\begingroup\$

A little background: I'm trying to extract a gate signal from someone else's circuit (ckt1) so that I can synchronize events in my design (ckt2) to a sequential trigger in theirs. First problem is I have no way of accessing a schematic or firmware for their design, so I'm having to get creative. What I do have is ckt1's status LED's which light up during the gate events I'm interested in extracting. The LED's (and current limiting resistors) are arranged in a 4x4 matrix controlled by darlington transistor pairs (best I can tell anyways). These are the nodes I'm breaking out to ckt2 (left of the black line in picture). enter image description here Second problem is the LED's aren't held high for the duration of the gate on signals of interest, rather they are driven by PWM (presumably to save battery and soften the light). So The circuit on the right half is what I've devised to reproduce the longer gate signal from the PWM.

In their off state, the LED/CLR pairs are floating between two transistors (at least one transistor in off state anyways). As a result, their common mode voltage when off is relatively low, but their voltage WRT ground is all over the place. So my first question is, can I get away with having these inputs to ckt2 floating? (ie. no common ground connection between the the two circuits). In my first tests, no common ground produces a cleaner output when viewed on the oscope. But are there any potential long term problems? The only one I foresee is that elsewhere in the circuit I'm extracting some signals which are referenced to ckt1 GND, so I'm thinking I'll have to use a rail splitter to create a virtual GND in ckt2 to connect to this reference (thus preserving the floating inputs in the circuit above).

Also, I realized I could eliminate one schmitt inverter on the output if I instead reference the subtractor to +12, swap the inputs, and change the subtractor/inverter interface as shown below. Is there anything wrong with referencing the subtractor to the positive rail like this? enter image description here

\$\endgroup\$
1
\$\begingroup\$

schematic

simulate this circuit – Schematic created using CircuitLab

Figure 1. An opto-isolator solves the problem of floating inputs to the OP's comparitor. (a) Series connection. (b) Parallel connection.

Consider the circuit of Figure 1 as a possible solution. Using the opto effectively solves the floating input issue. Just check the response time of your chosen opto to make sure it switches quickly enough for your application.

(a) Opto-isolators use infra-red LEDs with a typical Vf (forward voltage drop) of 1.2 V. It may be necessary to reduce the value of R1 accordingly.

(b) If the voltage headroom is inadequate to drive the series configuration of Figure 1a then 1b may provide a solution. R5 limits the current and provides the additional voltage drop between the visible LED (1.8 to 2.0 V) and the infra-red of the opto-isolator (1.2 V). Again R3's value would need to be reduced to cope with the approximately doubled current.

schematic

simulate this circuit

Figure 2c. As per Ressull's comment below a parallel connection simplifies the solution even further.

\$\endgroup\$
  • \$\begingroup\$ If the drive energy available is adequate you can connect the opto + a new series resistor from above R1 and below existing D2 and so not need to break the existing circuit. \$\endgroup\$ – Russell McMahon Aug 8 '16 at 11:21
  • \$\begingroup\$ Thanks for the opto-isolator ideas. I have some laying around somewhere, I'll give it a try later on. But I'm still curious, is there actually any problem with leaving the inputs to float in this case? Since I'm only interested in the difference in the two signals.. \$\endgroup\$ – Stephen Thomas Barnwell Aug 9 '16 at 13:07
  • 1
    \$\begingroup\$ It's hard to say without understanding the driving circuit. If both lines are really floating they could go to any voltage. You may also have leakage through other parts of the multiplexer. I've just noticed that your scheme has another problem. If the op-amp pulls to -12 V then IC6 input will be pulled below ground and damaged. \$\endgroup\$ – Transistor Aug 9 '16 at 17:03

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.