I'm designing a battery-powered radio-linked sensor device which requires a long lifetime. Due to the project requirements I have very little onboard energy to work with; a single coin cell is the likely source and the lifetime requirement is at least a week.
My primary power savings will come from placing the device into a deep sleep mode and waking it with a timer every ten or so minutes to take a reading and transmit it. This means that for only 0.5% of the time is the device drawing any significant power; during the sleep state the consumption will be in the units of microamps at most.
The proposed process is as follows:
- MCU is powered on.
- The sensor is powered on by the MCU and a one-second grace time is given. The MCU is placed into a sleep state until the grace period elapses.
- The MCU communicates with the device via I2C or SPI and gets a reading.
- The sensor is powered off by the MCU.
- The transmitter circuitry is powered on by the MCU.
- The reading is transmitted.
- The transmitter circuitry is powered off by the MCU.
- The MCU triggers an external low-power (nA range) timer device which is configured to delay for approximately ten minutes.
- The MCU puts itself in power-down mode to conserve power.
- The external timer device triggers a pulse to a GPIO pin, which raises a waking interrupt in the MCU, returning us to step 1.
The ATtiny44A has multiple clock modes (section 6.2): an internal calibrated 8MHz clock, a low-precision internal 128kHz clock, and support for external clock sources and crystals. These can then be stepped down using the clock prescaler (see fig. 6-1 and section 6.3 for a description). I will be running the MCU at 3.3V.
As the processes performed by the MCU are not particularly time-critical, I'm trying to decide which of the following strategies are more optimal for low power consumption:
- Use the internal calibrated 8MHz clock as-is with no prescaling, to minimise the time during which the MCU will be switched on. This has the benefit of speeding up the few calculations I'm doing on-chip and speeding up the IO with the sensor and transmitter devices. However, a potential downside is that other internal clocks are running at a higher frequency, and will remain running during the one-second grace period in step 2. My gut says that this is a poor choice since any power saved by quicker computation will be dwarfed by the one second of running the clock on idle.
- Use the 128kHz low precision internal clock source. This increases computation and IO time, but may save power during the grace period.
- Use the internal calibrated 8MHz clock with the prescaler set to 1/64, producing a 125kHz clock speed, emulating the low precision internal clock. I am unsure as to whether this is a useful option.
- Use the internal calibrated 8MHz clock with the prescaler set to 1/256 (the maximum), producing a 31.25kHz clock speed. Again I'm unsure if this will save power.
Which of these, in the scenario described above, will result in the lowest power consumption?