Processor is little-endian.
Under followings addresses we have following values (hexdecimal format):

1000: FA 
1001: 46 
1002: 26
1003: C3

Now, processor is going to do following 16-bits operations:
1. Load to register R1 value of address 1000 (remember that operations are 16-bits).
2. XOR value of address 1002 with value of register R1.
3. Save result of XOR at address 1010

I show you, how I understand what processor do:
1. Because of the fact that processor is little-endian it loads to R1 value: 46 FA.
2. xor with value of address 1002 with R1 is:
XOR(C3 26, 46 FA)=85 DC
3. Now, at addresses 1010 and 1011 we have:

Tell me please, Am I ok ? If I correctly understand this issue ?

  • \$\begingroup\$ Yea you've got it. Just remember little-endian means the memory address points at the least significant byte (the little end), of multi-byte values. \$\endgroup\$
    – vicatcu
    Aug 13 '16 at 23:06

You have it completely correct, and Transistor's answer is good. Here is some extra information though:

Note that logical operations like XOR, AND and OR only look at the same bits in the two values. So in this case it doesn't matter if the processor is little-endian, big-endian, or which way around the operands are. The result will be the same values at addresses 1010 and 1011 regardless:

Little Endian:
C326 xor 46FA = 85DC (stored as DC 85)
46FA xor C326 = 85DC (stored as DC 85)
Big Endian:
26C3 xor FA46 = DC85 (stored as DC 85)
FA46 xor 26C3 = DC85 (stored at DC 85)

It is only when you use mathematical operations instead of logical ones, like ADD, SUB and MUL, that little-endian and big-endian matter - and in the case of SUB, the order of the operands. An ADD adds the lowest bits of the two words, which may produce a carry. It then adds the next lowest bits of the two words plus any carry, which may produce another carry. This moves up the bits, and so where the byte boundary is becomes important - the carry has to move across it!

Little Endian:
C326 + 46FA = 0A20 (stored as 20 0A)
46FA + C326 = 0A20 (stored as 20 0A)
Big Endian:
26C3 + FA46 = 2109 (stored as 21 09)
FA46 + 26C3 = 2109 (stored as 21 09)

Little Endian:
C326 - 46FA = 7C2C (stored as 2C 7C)
46FA - C326 = 83D4 (stored as D4 83)
Big Endian:
26C3 - FA46 = 2C5F (stored as 2C 5F)
FA46 - 26C3 = D383 (stored as D3 83)
  • \$\begingroup\$ thanks you very much! However I have another one question: (assuming littler-endian processor, 16-bits operations, value under address of memory 1000:5D, 1001:AF) Then processor loads value of address 1000 into register R1. Then value of R1 is AF 5D . Ok ? \$\endgroup\$
    – user119974
    Aug 14 '16 at 9:02
  • 1
    \$\begingroup\$ Yes. That is 100% correct. \$\endgroup\$ Aug 14 '16 at 9:11
  • \$\begingroup\$ So during loading value from memory to register, little-endian processor reverse bytes. Thanks you very much! \$\endgroup\$
    – user119974
    Aug 14 '16 at 9:40

You are correct in your understanding of the "endian" layout ...

enter image description here enter image description here

Figure 1. Little-endian and big-endian memory layout. Source: Wikipedia.

... and your calculations are correct.

If anyone wants to check then switch your computer's calculator into Programmer Mode and do the hexadecimal XOR calculation.

  • \$\begingroup\$ On the whole, reasoning is ok ? \$\endgroup\$
    – user119974
    Aug 13 '16 at 22:13
  • 1
    \$\begingroup\$ It looks fine. I recommend you un-accept for a day or so to encourage other answers. I don't expect anyone to contradict us but someone may have a tip or a different viewpoint that is helpful in some other way. \$\endgroup\$
    – Transistor
    Aug 13 '16 at 22:16
  • \$\begingroup\$ ok, I unaccepted. \$\endgroup\$
    – user119974
    Aug 13 '16 at 22:19
  • \$\begingroup\$ Darn! You got a better answer. ;^) No problem. \$\endgroup\$
    – Transistor
    Aug 14 '16 at 12:32

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