# Xilinx Programming FPGA from SPI Flash without JTAG

I'm trying to be able to configure my FPGA by loading the configuration into the flash memory. I am able to write to the SPI flash through an ethernet interface, so I think it would be possible to write the bitstream to the flash over ethernet, and that way I could program the FPGA over the network without using a JTAG cable. Is this possible? How should I generate the bitstream in Vivado? What address in the flash should I use?

I am using a Kintex-7 FPGA and and a Spansion S25FL256S SPI flash chip.

Thanks!!

• You really should read the Xilinx literature on this. Some of their FPGAs can act as an SPI master to autonomously read out data from some types of SPI flashes. Failing that, any little micro should be able to read the flash and push the data in via whatever Xilinx calls their "send it clock and data" bitstream interface. – Chris Stratton Aug 14 '16 at 20:00
• @ChrisStratton Thanks for your comment. I tried looking at the Xilinx documentation and could really only find information on programming the flash memory with the bitstream using JTAG. Can you point me to some useful documentation? Also, I'm not sure what you mean by "send it clock and data." – Ethan Aug 14 '16 at 20:18
• They call it slave serial: xilinx.com/support/documentation/application_notes/xapp502.pdf Again, this is distinct from the master mode they have which supports some flashes, take time to look at all your options before deciding, though if you already have an MCU in the system letting that do it via slave serial can make a lot of sense, especially as that may be your path for changing the flash contents or want to use part of the flash for something else. – Chris Stratton Aug 14 '16 at 20:23

See UG470 and XAPP1247 for more information. XAPP1247 also contains what you need to put in the XDC files to adjust the bit files to automatically boot the 'main' image and automatically fall back on the 'golden' image without having to perform ICAP operations in the design itself.

Here is some python code to parse the header on a bit file:

import struct
import sys

bit_name = 'some_bit_file.bit'

print("Reading bit file %s" % bit_name)

try:
bit_file = open(bit_name, 'rb')
except Exception as ex:
print("Error opening \"%s\": %s" %(bit_name, ex.strerror), file=sys.stderr)
exit(1)

# Field 1

# Field 2

# Field 3
# Design name
print("Design name: %s" % design_name)

# Field 4
# Part name
print("Part name: %s" % part_name)

# Field 5
# date
print("Date: %s" % date)

# Field 6
# time
print("Time: %s" % t)

# Field 7
# data