Based on datasheet page 17:
GPIO registers are located on the ARM Cortex M0+ IO bus for fastest possible single-cycle I/O timing, allowing GPIO toggling with rates of up to 15 MHz.
And I used a tiny code (based on the LPCOPEN library) to test its speed:
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 0, 12);
while(1)
{
Chip_GPIO_SetPinState(LPC_GPIO_PORT, 0, 12, true);
Chip_GPIO_SetPinState(LPC_GPIO_PORT, 0, 12, false);
}
When I trace this GPIO pin by logic analyzer, it's toggling around 250 kHz which is far from the mentioned value in datasheet.
I also used PLL to increase main clock and system clock for achieving better speed:
Chip_IRC_SetFreq(96000000, 24000000);
but even for different values 250 kHz is the highest frequency which I can achieve. Decreasing PLL speed cause decrements on output frequency of GPIO and also I know I can achieve better speed with assembly code but 250 kHz is so far away from datasheet, and it seems the MCU are not able to exceed this limit (there are same substance for 60 MHz/30MHz – 60MHz/15MHz and so) Also 250 kHz is maximum speed which pins in the SPI peripheral state can toggled.
EDIT: I'm aware that for full speed test, needed to code in assembly directly with registers, but as I said before the problem is after increasing the 12 MHz main clock, GPIO cannot toggle faster, and also toggling speed for SPI CLOCK pin is limited to this speed too.