I have designed the attached power selector circuit, it has a 12V input and a 15V input, and should prioritize the later.

Automatic power input selector circuit

It operates in three different scenarios:

1- 12V source R76+R79 divider polarizes the Q25 BJT, driving the gate of the the Q9 P-MOS low, sucessfully generating -12V Vgs and opening the channel for current to pass. That way, I can switch this line without having the voltage drop on the intrinsic diode from Q9A.

2- 15V source R80+R84 divider acts in the same way as mode of operation #1, instead driving the gate of the MOSFET Q9B through BJT Q28.

3- Both Sources The 15V supply has priority, so when it is connected, it drives not only Q28, but also Q27 - This transistor brings the base of Q25 to GND, effectively bringing the Collector of Q25 to 12V, so that Q9A is not in conduction mode anymore.

What I'm observing, is that even when I'm in mode of operation #1, it seems that Q27 gets polarized in some way, as if the 15V supply were present. That closes the channel on Q9A and all the current supplied by the 12V source has to go through the intrinsic Diode, thus heating Q9A by a considerable ammount (we are talking in the 7 Amps figure here, so a diode drop is quite significant in terms of dissipated power).

I designed this circuit with the intention of having no diode drops, and have fallen exactly on that scenario... The question is: Why is Q27 still driving the gate of Q25 to GND if I haven't fed the 15V input?

  • \$\begingroup\$ Can you confirm that Q9A and Q9B source are tied together? I.e. drains connected to supplies and sources to output? Instead of the drains being in the switching side (output)? For a true analog switch, often one needs two fets in series with opposing body diodes. \$\endgroup\$
    – scorpdaddy
    Commented Aug 15, 2016 at 16:34
  • \$\begingroup\$ @scorpdaddy, yes, the sources are connected together. The goal was indeed to implement an analog switch, but I though that dual Fets with intrisic diodes tied back to back were needed only for bidirectional switching, which is exactly what I don't want.After some simulation in FALSTAD I noticed that even the smallest ammount of leakage current may polarize Q27 and screw the system's design... Does that make sense to you? \$\endgroup\$ Commented Aug 15, 2016 at 18:31
  • \$\begingroup\$ Can you measure P7 pin 1 and Q27 pin b? \$\endgroup\$
    – scorpdaddy
    Commented Aug 15, 2016 at 19:30
  • \$\begingroup\$ P7 pin 1 is at 14,9V Q27 base is at 0.7V roughly. Measurements were taken with both supplies active. When the 15V supply is disconnected, one would expect that the base of Q27 would go to GND, but that doesn't happen, voltage is stuck at 0,7V. It feels like the current from the 12V supply is indeed leaking by Q9B and polarizing Q27, but that stray current should be very low, I'm having a hard time believing that this is a decent explanation \$\endgroup\$ Commented Aug 15, 2016 at 19:48
  • \$\begingroup\$ @LeonardoRossi you wrote a wonderful problem statement, could you also ask a question? This is a Q&A site and we prefer to have a clearly marked question in the original post. electronics.stackexchange.com/help/how-to-ask \$\endgroup\$
    – Voltage Spike
    Commented Aug 15, 2016 at 19:48

1 Answer 1


This circuit is just incorrect. First, R77 and R81 should be connected to source, not drain. As it is, the resistances behind drain pull gate low and open the mosfet. Second, the npn with the mosfet form a latch.


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