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I'm in need of remoting the gigabit ethernet connector from the main board to a back end board that has all the other connectors. I plan on doing this with a high speed board to board connector (Samtec QRF8-026-05.0-L-D-A-GP which has a ground plane and using extra pins to separate the differential pairs), but I don't know if it is less damaging to signal integrity to remote the PHY from the magnetics and have the magnetics in the same board as the connector (built-in magnetics are not an option), or have the magnetics on the main board and remote the connector alone. This is under 1.5 inches of remoting overall.

One restriction is that the board area in the connector board is very limited.

I know that ideally they should all be on the same board but remoting the connector will help a lot in the overall design of the product.

EDIT:

If at all possible, please explain your answer in terms of the physics involved.

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Put the magnetics close to the phy. Put the phy close to the mac. Run the "connector side" of the magnetics a long distance-- after all, isn't that what it's designed for, running long distances? Running the RGMII or GMII signals a long distance, and board to board, is not impossible but far from ideal or easy.

I do recommend shielding the cable/connections from the magnetics to the connector if you're running them any reasonable distance. This is so you don't pick up too much emi from inside the chassis, or taking emi from outside the chassis and bring it inside.

I should also say that I've done this successfully, several times, for several different products that are in volume production.

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  • \$\begingroup\$ Have you ever done this with gigabit Ethernet or just 10/100 ? \$\endgroup\$ – Mark Jan 21 '12 at 21:21
  • \$\begingroup\$ @Mark I've done it with both Gig-E and 10/100Base-T. \$\endgroup\$ – user3624 Jan 21 '12 at 23:18
  • \$\begingroup\$ @DavidKessner For some reason the guidelines I've encountered from PHY manufacturers that specifically address this issue (Intel document 317503-001, SMSC Component Placement Checklist for the LAN83C185, Davicom DM9161B Layout Guide) consider the magnetics-connector lines the highest priority, and even suggest shorter maximum lengths compared to the others, but they never justify it (why would they anyway). Since this answer is based on experience I am selecting it for now, if anything as a challenge for someone to disprove it. \$\endgroup\$ – apalopohapa Jan 23 '12 at 19:54
  • \$\begingroup\$ @apalopohapa The danger is that the magnetics to connector signals are the most susceptible to picking up EMI from inside the box and broadcasting them outside. The advantage is that those signals are the easiest to route while keeping signal integrity. Normally the magnetics have a choke to help with EMI filtering. Keep that in mind when figuring out what to do. \$\endgroup\$ – user3624 Jan 23 '12 at 21:35
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If at all possible, reconsider the design. The currents and frequencies (125Mhz symbol rate) traveling from the PHY to the jack are very high. You will have major EMI considerations with running this though an inter-board connection (you may fail FCCp15). Your EMI issue will be MUCH greater than the average chip to chip signal traveling through the same connector due to the increased currents.

That said, the magnetics need to be as close to the connector as possible, no question there.

Your going to have to be very careful of impedance matching the PHY <-> Magnetics link with proper termination going through that connector. You may also need plenty of ground connections in the connector.

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Put the magnetics to connector close, remoting the PHY. While this doesn't change the physics, it makes passing UL easier since you don't have external signals that could be 100 V+ in a hi-pot test going all over.

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