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I've been trying for the past hour to find the correct definition and the proper way to use the,

DML, DQSL, DQUO, DMU, DQSU, DQSU, the part has two DQSU pins. There are no corresponding pins on the A20 SOC, I've read the data sheet but no useful info, the memory IC is AS4C128M16D3B-12BCN 2GB from Alliance Memory.

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DML is Data Mask Low and is the data mask for DQ[0:7]L on the DDR. DMU is Data Mask Upper and is the data mask for DQ[0:7]H

The corresponding A20 signals (if you are using a single DDR) are SDQM[0] and SDQM1

DQU0 is Data bit upper 0 and would map to SDQ[8]

DQSU and DQSU(with a bar) are the data strobe differential pair (upper) and would map to SDQS1 and SDQSB1 (assuming you are using the upper bye of the memory on DQ[8:15] from the A20

This assumes a 16 bit implementation with the lower byte on the memory mapped to DQ[0:7] at the A20 and the upper byte mapped to DQ[8:15] on the A20.

For a 32 bit implementation, just continue the same technique for data bits 16 to 31.

This requires an understanding of DDRx interfaces to be able to map across different naming conventions (which is very common).

Picture with the names you are confused about:

DDRx interface to A20

Note: extra clock signals are often provided to prevent timing skew due to loading. If you intend on using just 2 devices use both clocks (clk to 1 device, clk1 to the other device).

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  • \$\begingroup\$ Thank you! I've realised I need 32bit memory, so will be using two 1GB 16bits, can I apply this to duel? \$\endgroup\$
    – OzzieSpin
    Aug 31, 2016 at 16:06
  • \$\begingroup\$ Yes - just use the higher order data groups and controls. \$\endgroup\$ Aug 31, 2016 at 16:51
  • \$\begingroup\$ The system would not function well if it had only 16bit DDR3L? \$\endgroup\$
    – OzzieSpin
    Sep 1, 2016 at 13:42
  • \$\begingroup\$ The user manual and data sheet are very unclear on bus widths supported for DDR3L. \$\endgroup\$ Sep 1, 2016 at 14:03
  • \$\begingroup\$ Turns out there are other A20 based boards using 16bit DDR3L, so I'm going to give it a go. Its not for any thing intensive, just for learning about the DDR3, and SOCs. Thank you for your help! Much appreciated. \$\endgroup\$
    – OzzieSpin
    Sep 2, 2016 at 20:31

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