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I have a few development boards I was working on and I noticed that a few of the microchips have a completely mirror-like surface on top of the chip. The chips tend to be very small, just a few millimeters wide and deep. What is on the surface of these chips and why?

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These are probably chipscale packages. So you're looking at the top of the actual silicon die. The bottom is processed so that there are solder balls for connection to the PCB.

If you've ever seen a silicon wafer you know that it's polished to a mirror like silvery-gray finish.

One issue you can sometimes have with CSP devices is that they can be sensitive to light, since the silicon is exposed.

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    \$\begingroup\$ Technically the mirror surface of the silicon die is the "bottom" of the die. Particularly if one considers that all the diffusions and metalization layers are implemented on the "top" of the die. \$\endgroup\$ – Michael Karas Aug 31 '16 at 22:17
  • \$\begingroup\$ Absolutely correct from a technical and IC design viewpoint, but users tend to think of the bottom of a part being the side that attaches to the PCB and the top the side that faces up. So maybe it's the bottom of the die and the top of the IC at the same time? \$\endgroup\$ – John D Aug 31 '16 at 22:30
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What is on the surface of these chips and why?

You are seeing the silicon die of the chip itself. This isn't a new phenomena.

enter image description here

Figure 1. An Intel 1702A EPROM, one of the earliest (1971) EPROM types, 256 by 8 bit. The small quartz window admits UV light to the chip for erasure. Source: Wikipedia [EPROM}(https://en.wikipedia.org/wiki/EPROM).

What has changed is the packaging. In the photo the gold wires are bonded to the top of the chip and out to the lead frame. With surface mount the connections between chip and board are made out of sight below the chip.

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